OpenCores
URL https://opencores.org/ocsvn/spi_master_slave/spi_master_slave/trunk

Subversion Repositories spi_master_slave

[/] [spi_master_slave/] [trunk/] [syn/] [spi_master_atlys_top_envsettings.html] - Diff between revs 20 and 22

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<td><b>par</b></td>
<td><b>par</b></td>
</tr>
</tr>
<tr>
<tr>
<td>PATHEXT</td>
<td>PATHEXT</td>
<td>.COM;<br>.EXE;<br>.BAT;<br>.CMD;<br>.VBS;<br>.VBE;<br>.JS;<br>.JSE;<br>.WSF;<br>.WSH;<br>.MSC</td>
<td>.COM;<br>.EXE;<br>.BAT;<br>.CMD;<br>.VBS;<br>.VBE;<br>.JS;<br>.JSE;<br>.WSF;<br>.WSH;<br>.MSC</td>
<td>.COM;<br>.EXE;<br>.BAT;<br>.CMD;<br>.VBS;<br>.VBE;<br>.JS;<br>.JSE;<br>.WSF;<br>.WSH;<br>.MSC</td>
<td><font color=gray>.COM;<br>.EXE;<br>.BAT;<br>.CMD;<br>.VBS;<br>.VBE;<br>.JS;<br>.JSE;<br>.WSF;<br>.WSH;<br>.MSC</font></td>
<td>.COM;<br>.EXE;<br>.BAT;<br>.CMD;<br>.VBS;<br>.VBE;<br>.JS;<br>.JSE;<br>.WSF;<br>.WSH;<br>.MSC</td>
<td><font color=gray>.COM;<br>.EXE;<br>.BAT;<br>.CMD;<br>.VBS;<br>.VBE;<br>.JS;<br>.JSE;<br>.WSF;<br>.WSH;<br>.MSC</font></td>
<td>.COM;<br>.EXE;<br>.BAT;<br>.CMD;<br>.VBS;<br>.VBE;<br>.JS;<br>.JSE;<br>.WSF;<br>.WSH;<br>.MSC</td>
<td><font color=gray>.COM;<br>.EXE;<br>.BAT;<br>.CMD;<br>.VBS;<br>.VBE;<br>.JS;<br>.JSE;<br>.WSF;<br>.WSH;<br>.MSC</font></td>
</tr>
</tr>
<tr>
<tr>
<td>Path</td>
<td>Path</td>
<td>C:\Xilinx\13.1\ISE_DS\ISE\\lib\nt;<br>C:\Xilinx\13.1\ISE_DS\ISE\\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\PlanAhead\bin;<br>C:\Xilinx\13.1\ISE_DS\ISE\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\ISE\lib\nt;<br>C:\Xilinx\13.1\ISE_DS\EDK\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\EDK\lib\nt;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnu\microblaze\nt\bin;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnuwin\bin;<br>C:\Xilinx\13.1\ISE_DS\common\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\common\lib\nt;<br>C:\Windows;<br>C:\csvn\bin\;<br>C:\csvn\Python25\;<br>C:\Program Files\Common Files\Microsoft Shared\Windows Live;<br>C:\Xilinx\11.1\PlanAhead\bin;<br>C:\Xilinx\11.1\common\bin\nt;<br>C:\Xilinx\11.1\ISE\bin\nt;<br>C:\Xilinx\11.1\ISE\lib\nt;<br>C:\Windows\system32;<br>C:\Windows\System32\Wbem;<br>C:\Windows\System32\WindowsPowerShell\v1.0\;<br>C:\Program Files\Flash Magic;<br>C:\Cadence\Orcad_9.2.3\tools\Capture;<br>C:\Cadence\Orcad_9.2.3\tools\bin;<br>C:\Cadence\Orcad_9.2.3\tools\jre\bin;<br>C:\Cadence\Orcad_9.2.3\tools\fet\bin;<br>C:\Cadence\Orcad_9.2.3\tools\specctra\bin;<br>C:\Program Files\Altium Designer Winter 09\System;<br>C:\Program Files\Microsoft SQL Server\90\Tools\binn\;<br>C:\Program Files\Windows Live\Shared;<br>C:\Program Files\QuickTime\QTSystem\;<br>C:\Program Files\TortoiseSVN\bin;<br>C:\Program Files\IDM Computer Solutions\UltraEdit\</td>
<td>C:\Xilinx\13.1\ISE_DS\ISE\\lib\nt;<br>C:\Xilinx\13.1\ISE_DS\ISE\\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\PlanAhead\bin;<br>C:\Xilinx\13.1\ISE_DS\ISE\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\ISE\lib\nt;<br>C:\Xilinx\13.1\ISE_DS\EDK\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\EDK\lib\nt;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnu\microblaze\nt\bin;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnuwin\bin;<br>C:\Xilinx\13.1\ISE_DS\common\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\common\lib\nt;<br>C:\Windows;<br>C:\csvn\bin\;<br>C:\csvn\Python25\;<br>C:\Program Files\Common Files\Microsoft Shared\Windows Live;<br>C:\Xilinx\11.1\PlanAhead\bin;<br>C:\Xilinx\11.1\common\bin\nt;<br>C:\Xilinx\11.1\ISE\bin\nt;<br>C:\Xilinx\11.1\ISE\lib\nt;<br>C:\Windows\system32;<br>C:\Windows\System32\Wbem;<br>C:\Windows\System32\WindowsPowerShell\v1.0\;<br>C:\Program Files\Flash Magic;<br>C:\Cadence\Orcad_9.2.3\tools\Capture;<br>C:\Cadence\Orcad_9.2.3\tools\bin;<br>C:\Cadence\Orcad_9.2.3\tools\jre\bin;<br>C:\Cadence\Orcad_9.2.3\tools\fet\bin;<br>C:\Cadence\Orcad_9.2.3\tools\specctra\bin;<br>C:\Program Files\Altium Designer Winter 09\System;<br>C:\Program Files\Microsoft SQL Server\90\Tools\binn\;<br>C:\Program Files\Windows Live\Shared;<br>C:\Program Files\QuickTime\QTSystem\;<br>C:\Program Files\TortoiseSVN\bin;<br>C:\Program Files\IDM Computer Solutions\UltraEdit\</td>
<td>C:\Xilinx\13.1\ISE_DS\ISE\\lib\nt;<br>C:\Xilinx\13.1\ISE_DS\ISE\\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\PlanAhead\bin;<br>C:\Xilinx\13.1\ISE_DS\ISE\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\ISE\lib\nt;<br>C:\Xilinx\13.1\ISE_DS\EDK\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\EDK\lib\nt;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnu\microblaze\nt\bin;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnuwin\bin;<br>C:\Xilinx\13.1\ISE_DS\common\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\common\lib\nt;<br>C:\Windows;<br>C:\csvn\bin\;<br>C:\csvn\Python25\;<br>C:\Program Files\Common Files\Microsoft Shared\Windows Live;<br>C:\Xilinx\11.1\PlanAhead\bin;<br>C:\Xilinx\11.1\common\bin\nt;<br>C:\Xilinx\11.1\ISE\bin\nt;<br>C:\Xilinx\11.1\ISE\lib\nt;<br>C:\Windows\system32;<br>C:\Windows\System32\Wbem;<br>C:\Windows\System32\WindowsPowerShell\v1.0\;<br>C:\Program Files\Flash Magic;<br>C:\Cadence\Orcad_9.2.3\tools\Capture;<br>C:\Cadence\Orcad_9.2.3\tools\bin;<br>C:\Cadence\Orcad_9.2.3\tools\jre\bin;<br>C:\Cadence\Orcad_9.2.3\tools\fet\bin;<br>C:\Cadence\Orcad_9.2.3\tools\specctra\bin;<br>C:\Program Files\Altium Designer Winter 09\System;<br>C:\Program Files\Microsoft SQL Server\90\Tools\binn\;<br>C:\Program Files\Windows Live\Shared;<br>C:\Program Files\QuickTime\QTSystem\;<br>C:\Program Files\TortoiseSVN\bin;<br>C:\Program Files\IDM Computer Solutions\UltraEdit\</td>
<td><font color=gray>C:\Xilinx\13.1\ISE_DS\ISE\\lib\nt;<br>C:\Xilinx\13.1\ISE_DS\ISE\\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\PlanAhead\bin;<br>C:\Xilinx\13.1\ISE_DS\ISE\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\ISE\lib\nt;<br>C:\Xilinx\13.1\ISE_DS\EDK\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\EDK\lib\nt;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnu\microblaze\nt\bin;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnuwin\bin;<br>C:\Xilinx\13.1\ISE_DS\common\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\common\lib\nt;<br>C:\Windows;<br>C:\csvn\bin\;<br>C:\csvn\Python25\;<br>C:\Program Files\Common Files\Microsoft Shared\Windows Live;<br>C:\Xilinx\11.1\PlanAhead\bin;<br>C:\Xilinx\11.1\common\bin\nt;<br>C:\Xilinx\11.1\ISE\bin\nt;<br>C:\Xilinx\11.1\ISE\lib\nt;<br>C:\Windows\system32;<br>C:\Windows\System32\Wbem;<br>C:\Windows\System32\WindowsPowerShell\v1.0\;<br>C:\Program Files\Flash Magic;<br>C:\Cadence\Orcad_9.2.3\tools\Capture;<br>C:\Cadence\Orcad_9.2.3\tools\bin;<br>C:\Cadence\Orcad_9.2.3\tools\jre\bin;<br>C:\Cadence\Orcad_9.2.3\tools\fet\bin;<br>C:\Cadence\Orcad_9.2.3\tools\specctra\bin;<br>C:\Program Files\Altium Designer Winter 09\System;<br>C:\Program Files\Microsoft SQL Server\90\Tools\binn\;<br>C:\Program Files\Windows Live\Shared;<br>C:\Program Files\QuickTime\QTSystem\;<br>C:\Program Files\TortoiseSVN\bin;<br>C:\Program Files\IDM Computer Solutions\UltraEdit\</font></td>
<td>C:\Xilinx\13.1\ISE_DS\ISE\\lib\nt;<br>C:\Xilinx\13.1\ISE_DS\ISE\\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\PlanAhead\bin;<br>C:\Xilinx\13.1\ISE_DS\ISE\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\ISE\lib\nt;<br>C:\Xilinx\13.1\ISE_DS\EDK\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\EDK\lib\nt;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnu\microblaze\nt\bin;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnuwin\bin;<br>C:\Xilinx\13.1\ISE_DS\common\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\common\lib\nt;<br>C:\Windows;<br>C:\csvn\bin\;<br>C:\csvn\Python25\;<br>C:\Program Files\Common Files\Microsoft Shared\Windows Live;<br>C:\Xilinx\11.1\PlanAhead\bin;<br>C:\Xilinx\11.1\common\bin\nt;<br>C:\Xilinx\11.1\ISE\bin\nt;<br>C:\Xilinx\11.1\ISE\lib\nt;<br>C:\Windows\system32;<br>C:\Windows\System32\Wbem;<br>C:\Windows\System32\WindowsPowerShell\v1.0\;<br>C:\Program Files\Flash Magic;<br>C:\Cadence\Orcad_9.2.3\tools\Capture;<br>C:\Cadence\Orcad_9.2.3\tools\bin;<br>C:\Cadence\Orcad_9.2.3\tools\jre\bin;<br>C:\Cadence\Orcad_9.2.3\tools\fet\bin;<br>C:\Cadence\Orcad_9.2.3\tools\specctra\bin;<br>C:\Program Files\Altium Designer Winter 09\System;<br>C:\Program Files\Microsoft SQL Server\90\Tools\binn\;<br>C:\Program Files\Windows Live\Shared;<br>C:\Program Files\QuickTime\QTSystem\;<br>C:\Program Files\TortoiseSVN\bin;<br>C:\Program Files\IDM Computer Solutions\UltraEdit\</td>
<td><font color=gray>C:\Xilinx\13.1\ISE_DS\ISE\\lib\nt;<br>C:\Xilinx\13.1\ISE_DS\ISE\\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\PlanAhead\bin;<br>C:\Xilinx\13.1\ISE_DS\ISE\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\ISE\lib\nt;<br>C:\Xilinx\13.1\ISE_DS\EDK\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\EDK\lib\nt;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnu\microblaze\nt\bin;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnuwin\bin;<br>C:\Xilinx\13.1\ISE_DS\common\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\common\lib\nt;<br>C:\Windows;<br>C:\csvn\bin\;<br>C:\csvn\Python25\;<br>C:\Program Files\Common Files\Microsoft Shared\Windows Live;<br>C:\Xilinx\11.1\PlanAhead\bin;<br>C:\Xilinx\11.1\common\bin\nt;<br>C:\Xilinx\11.1\ISE\bin\nt;<br>C:\Xilinx\11.1\ISE\lib\nt;<br>C:\Windows\system32;<br>C:\Windows\System32\Wbem;<br>C:\Windows\System32\WindowsPowerShell\v1.0\;<br>C:\Program Files\Flash Magic;<br>C:\Cadence\Orcad_9.2.3\tools\Capture;<br>C:\Cadence\Orcad_9.2.3\tools\bin;<br>C:\Cadence\Orcad_9.2.3\tools\jre\bin;<br>C:\Cadence\Orcad_9.2.3\tools\fet\bin;<br>C:\Cadence\Orcad_9.2.3\tools\specctra\bin;<br>C:\Program Files\Altium Designer Winter 09\System;<br>C:\Program Files\Microsoft SQL Server\90\Tools\binn\;<br>C:\Program Files\Windows Live\Shared;<br>C:\Program Files\QuickTime\QTSystem\;<br>C:\Program Files\TortoiseSVN\bin;<br>C:\Program Files\IDM Computer Solutions\UltraEdit\</font></td>
<td>C:\Xilinx\13.1\ISE_DS\ISE\\lib\nt;<br>C:\Xilinx\13.1\ISE_DS\ISE\\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\PlanAhead\bin;<br>C:\Xilinx\13.1\ISE_DS\ISE\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\ISE\lib\nt;<br>C:\Xilinx\13.1\ISE_DS\EDK\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\EDK\lib\nt;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnu\microblaze\nt\bin;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnuwin\bin;<br>C:\Xilinx\13.1\ISE_DS\common\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\common\lib\nt;<br>C:\Windows;<br>C:\csvn\bin\;<br>C:\csvn\Python25\;<br>C:\Program Files\Common Files\Microsoft Shared\Windows Live;<br>C:\Xilinx\11.1\PlanAhead\bin;<br>C:\Xilinx\11.1\common\bin\nt;<br>C:\Xilinx\11.1\ISE\bin\nt;<br>C:\Xilinx\11.1\ISE\lib\nt;<br>C:\Windows\system32;<br>C:\Windows\System32\Wbem;<br>C:\Windows\System32\WindowsPowerShell\v1.0\;<br>C:\Program Files\Flash Magic;<br>C:\Cadence\Orcad_9.2.3\tools\Capture;<br>C:\Cadence\Orcad_9.2.3\tools\bin;<br>C:\Cadence\Orcad_9.2.3\tools\jre\bin;<br>C:\Cadence\Orcad_9.2.3\tools\fet\bin;<br>C:\Cadence\Orcad_9.2.3\tools\specctra\bin;<br>C:\Program Files\Altium Designer Winter 09\System;<br>C:\Program Files\Microsoft SQL Server\90\Tools\binn\;<br>C:\Program Files\Windows Live\Shared;<br>C:\Program Files\QuickTime\QTSystem\;<br>C:\Program Files\TortoiseSVN\bin;<br>C:\Program Files\IDM Computer Solutions\UltraEdit\</td>
<td><font color=gray>C:\Xilinx\13.1\ISE_DS\ISE\\lib\nt;<br>C:\Xilinx\13.1\ISE_DS\ISE\\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\PlanAhead\bin;<br>C:\Xilinx\13.1\ISE_DS\ISE\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\ISE\lib\nt;<br>C:\Xilinx\13.1\ISE_DS\EDK\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\EDK\lib\nt;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnu\microblaze\nt\bin;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin;<br>C:\Xilinx\13.1\ISE_DS\EDK\gnuwin\bin;<br>C:\Xilinx\13.1\ISE_DS\common\bin\nt;<br>C:\Xilinx\13.1\ISE_DS\common\lib\nt;<br>C:\Windows;<br>C:\csvn\bin\;<br>C:\csvn\Python25\;<br>C:\Program Files\Common Files\Microsoft Shared\Windows Live;<br>C:\Xilinx\11.1\PlanAhead\bin;<br>C:\Xilinx\11.1\common\bin\nt;<br>C:\Xilinx\11.1\ISE\bin\nt;<br>C:\Xilinx\11.1\ISE\lib\nt;<br>C:\Windows\system32;<br>C:\Windows\System32\Wbem;<br>C:\Windows\System32\WindowsPowerShell\v1.0\;<br>C:\Program Files\Flash Magic;<br>C:\Cadence\Orcad_9.2.3\tools\Capture;<br>C:\Cadence\Orcad_9.2.3\tools\bin;<br>C:\Cadence\Orcad_9.2.3\tools\jre\bin;<br>C:\Cadence\Orcad_9.2.3\tools\fet\bin;<br>C:\Cadence\Orcad_9.2.3\tools\specctra\bin;<br>C:\Program Files\Altium Designer Winter 09\System;<br>C:\Program Files\Microsoft SQL Server\90\Tools\binn\;<br>C:\Program Files\Windows Live\Shared;<br>C:\Program Files\QuickTime\QTSystem\;<br>C:\Program Files\TortoiseSVN\bin;<br>C:\Program Files\IDM Computer Solutions\UltraEdit\</font></td>
</tr>
</tr>
<tr>
<tr>
<td>XILINX</td>
<td>XILINX</td>
<td>C:\Xilinx\13.1\ISE_DS\ISE\</td>
<td>C:\Xilinx\13.1\ISE_DS\ISE\</td>
<td>C:\Xilinx\13.1\ISE_DS\ISE\</td>
<td><font color=gray>C:\Xilinx\13.1\ISE_DS\ISE\</font></td>
<td>C:\Xilinx\13.1\ISE_DS\ISE\</td>
<td><font color=gray>C:\Xilinx\13.1\ISE_DS\ISE\</font></td>
<td>C:\Xilinx\13.1\ISE_DS\ISE\</td>
<td><font color=gray>C:\Xilinx\13.1\ISE_DS\ISE\</font></td>
</tr>
</tr>
<tr>
<tr>
<td>XILINX_DSP</td>
<td>XILINX_DSP</td>
<td>C:\Xilinx\13.1\ISE_DS\ISE</td>
<td>C:\Xilinx\13.1\ISE_DS\ISE</td>
<td>C:\Xilinx\13.1\ISE_DS\ISE</td>
<td><font color=gray>C:\Xilinx\13.1\ISE_DS\ISE</font></td>
<td>C:\Xilinx\13.1\ISE_DS\ISE</td>
<td><font color=gray>C:\Xilinx\13.1\ISE_DS\ISE</font></td>
<td>C:\Xilinx\13.1\ISE_DS\ISE</td>
<td><font color=gray>C:\Xilinx\13.1\ISE_DS\ISE</font></td>
</tr>
</tr>
<tr>
<tr>
<td>XILINX_EDK</td>
<td>XILINX_EDK</td>
<td>C:\Xilinx\13.1\ISE_DS\EDK</td>
<td>C:\Xilinx\13.1\ISE_DS\EDK</td>
<td>C:\Xilinx\13.1\ISE_DS\EDK</td>
<td><font color=gray>C:\Xilinx\13.1\ISE_DS\EDK</font></td>
<td>C:\Xilinx\13.1\ISE_DS\EDK</td>
<td><font color=gray>C:\Xilinx\13.1\ISE_DS\EDK</font></td>
<td>C:\Xilinx\13.1\ISE_DS\EDK</td>
<td><font color=gray>C:\Xilinx\13.1\ISE_DS\EDK</font></td>
</tr>
</tr>
<tr>
<tr>
<td>XILINX_PLANAHEAD</td>
<td>XILINX_PLANAHEAD</td>
<td>C:\Xilinx\13.1\ISE_DS\PlanAhead</td>
<td>C:\Xilinx\13.1\ISE_DS\PlanAhead</td>
<td>C:\Xilinx\13.1\ISE_DS\PlanAhead</td>
<td><font color=gray>C:\Xilinx\13.1\ISE_DS\PlanAhead</font></td>
<td>C:\Xilinx\13.1\ISE_DS\PlanAhead</td>
<td><font color=gray>C:\Xilinx\13.1\ISE_DS\PlanAhead</font></td>
<td>C:\Xilinx\13.1\ISE_DS\PlanAhead</td>
<td><font color=gray>C:\Xilinx\13.1\ISE_DS\PlanAhead</font></td>
</tr>
</tr>
</TABLE>
</TABLE>
<A NAME="Synthesis Property Settings"></A>
<A NAME="Synthesis Property Settings"></A>
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
Line 348... Line 348...
<td><b>Property Name</b></td>
<td><b>Property Name</b></td>
<td><b>Value</b></td>
<td><b>Value</b></td>
<td><b>Default Value</b></td>
<td><b>Default Value</b></td>
</tr>
</tr>
<tr>
<tr>
<td>-intstyle</td>
<td><font color=gray>-intstyle</font></td>
<td>&nbsp;</td>
<td><font color=gray>&nbsp;</font></td>
<td>ise</td>
<td><font color=gray>ise</font></td>
<td>None</td>
<td><font color=gray>None</font></td>
</tr>
</tr>
<tr>
<tr>
<td>-dd</td>
<td><font color=gray>-dd</font></td>
<td>&nbsp;</td>
<td><font color=gray>&nbsp;</font></td>
<td>_ngo</td>
<td><font color=gray>_ngo</font></td>
<td>None</td>
<td><font color=gray>None</font></td>
</tr>
</tr>
<tr>
<tr>
<td>-p</td>
<td><font color=gray>-p</font></td>
<td>&nbsp;</td>
<td><font color=gray>&nbsp;</font></td>
<td>xc6slx45-csg324-2</td>
<td><font color=gray>xc6slx45-csg324-2</font></td>
<td>None</td>
<td><font color=gray>None</font></td>
</tr>
</tr>
<tr>
<tr>
<td>-uc</td>
<td><font color=gray>-uc</font></td>
<td>&nbsp;</td>
<td><font color=gray>&nbsp;</font></td>
<td>spi_master_atlys.ucf</td>
<td><font color=gray>spi_master_atlys.ucf</font></td>
<td>None</td>
<td><font color=gray>None</font></td>
</tr>
</tr>
</TABLE>
</TABLE>
<A NAME="Map Property Settings"></A>
<A NAME="Map Property Settings"></A>
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
Line 384... Line 384...
<td><b>Property Name</b></td>
<td><b>Property Name</b></td>
<td><b>Value</b></td>
<td><b>Value</b></td>
<td><b>Default Value</b></td>
<td><b>Default Value</b></td>
</tr>
</tr>
<tr>
<tr>
<td>-detail</td>
<td><font color=gray>-detail</font></td>
<td>Generate Detailed MAP Report</td>
<td><font color=gray>Generate Detailed MAP Report</font></td>
<td>TRUE</td>
<td><font color=gray>TRUE</font></td>
<td>TRUE</td>
<td><font color=gray>TRUE</font></td>
</tr>
</tr>
<tr>
<tr>
<td>-ol</td>
<td><font color=gray>-ol</font></td>
<td>Place & Route Effort Level (Overall)</td>
<td><font color=gray>Place & Route Effort Level (Overall)</font></td>
<td>high</td>
<td><font color=gray>high</font></td>
<td>high</td>
<td><font color=gray>high</font></td>
</tr>
</tr>
<tr>
<tr>
<td>-xe</td>
<td><font color=gray>-xe</font></td>
<td>Placer Extra Effort Map</td>
<td><font color=gray>Placer Extra Effort Map</font></td>
<td>NORMAL</td>
<td><font color=gray>NORMAL</font></td>
<td>&nbsp;</td>
<td><font color=gray>&nbsp;</font></td>
</tr>
</tr>
<tr>
<tr>
<td>-xt</td>
<td><font color=gray>-xt</font></td>
<td>Extra Cost Tables</td>
<td><font color=gray>Extra Cost Tables</font></td>
<td>0</td>
<td><font color=gray>0</font></td>
<td>0</td>
<td><font color=gray>0</font></td>
</tr>
</tr>
<tr>
<tr>
<td>-global_opt</td>
<td><font color=gray>-global_opt</font></td>
<td>Global Optimization map</td>
<td><font color=gray>Global Optimization map</font></td>
<td>TRUE</td>
<td><font color=gray>TRUE</font></td>
<td>FALSE</td>
<td><font color=gray>FALSE</font></td>
</tr>
</tr>
<tr>
<tr>
<td>-ir</td>
<td><font color=gray>-ir</font></td>
<td>Use RLOC Constraints</td>
<td><font color=gray>Use RLOC Constraints</font></td>
<td>OFF</td>
<td><font color=gray>OFF</font></td>
<td>OFF</td>
<td><font color=gray>OFF</font></td>
</tr>
</tr>
<tr>
<tr>
<td>-mt</td>
<td><font color=gray>-mt</font></td>
<td>Enable Multi-Threading</td>
<td><font color=gray>Enable Multi-Threading</font></td>
<td>2</td>
<td><font color=gray>2</font></td>
<td>0</td>
<td><font color=gray>0</font></td>
</tr>
</tr>
<tr>
<tr>
<td>-t</td>
<td><font color=gray>-t</font></td>
<td>Starting Placer Cost Table (1-100) Map</td>
<td><font color=gray>Starting Placer Cost Table (1-100) Map</font></td>
<td>1</td>
<td><font color=gray>1</font></td>
<td>0</td>
<td><font color=gray>0</font></td>
</tr>
</tr>
<tr>
<tr>
<td>-r</td>
<td><font color=gray>-r</font></td>
<td>Register Ordering</td>
<td><font color=gray>Register Ordering</font></td>
<td>4</td>
<td><font color=gray>4</font></td>
<td>4</td>
<td><font color=gray>4</font></td>
</tr>
</tr>
<tr>
<tr>
<td>-equivalent_register_removal</td>
<td><font color=gray>-equivalent_register_removal</font></td>
<td>Equivalent Register Removal</td>
<td><font color=gray>Equivalent Register Removal</font></td>
<td>TRUE</td>
<td><font color=gray>TRUE</font></td>
<td>TRUE</td>
<td><font color=gray>TRUE</font></td>
</tr>
</tr>
<tr>
<tr>
<td>-intstyle</td>
<td><font color=gray>-intstyle</font></td>
<td>&nbsp;</td>
<td><font color=gray>&nbsp;</font></td>
<td>ise</td>
<td><font color=gray>ise</font></td>
<td>None</td>
<td><font color=gray>None</font></td>
</tr>
</tr>
<tr>
<tr>
<td>-lc</td>
<td><font color=gray>-lc</font></td>
<td>LUT Combining</td>
<td><font color=gray>LUT Combining</font></td>
<td>area</td>
<td><font color=gray>area</font></td>
<td>off</td>
<td><font color=gray>off</font></td>
</tr>
</tr>
<tr>
<tr>
<td>-o</td>
<td><font color=gray>-o</font></td>
<td>&nbsp;</td>
<td><font color=gray>&nbsp;</font></td>
<td>spi_master_atlys_top_map.ncd</td>
<td><font color=gray>spi_master_atlys_top_map.ncd</font></td>
<td>None</td>
<td><font color=gray>None</font></td>
</tr>
</tr>
<tr>
<tr>
<td>-w</td>
<td><font color=gray>-w</font></td>
<td>&nbsp;</td>
<td><font color=gray>&nbsp;</font></td>
<td>true</td>
<td><font color=gray>true</font></td>
<td>false</td>
<td><font color=gray>false</font></td>
</tr>
</tr>
<tr>
<tr>
<td>-pr</td>
<td><font color=gray>-pr</font></td>
<td>Pack I/O Registers/Latches into IOBs</td>
<td><font color=gray>Pack I/O Registers/Latches into IOBs</font></td>
<td>off</td>
<td><font color=gray>off</font></td>
<td>off</td>
<td><font color=gray>off</font></td>
</tr>
</tr>
<tr>
<tr>
<td>-p</td>
<td><font color=gray>-p</font></td>
<td>&nbsp;</td>
<td><font color=gray>&nbsp;</font></td>
<td>xc6slx45-csg324-2</td>
<td><font color=gray>xc6slx45-csg324-2</font></td>
<td>None</td>
<td><font color=gray>None</font></td>
</tr>
</tr>
</TABLE>
</TABLE>
<A NAME="Place and Route Property Settings"></A>
<A NAME="Place and Route Property Settings"></A>
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
Line 492... Line 492...
<td><b>Property Name</b></td>
<td><b>Property Name</b></td>
<td><b>Value</b></td>
<td><b>Value</b></td>
<td><b>Default Value</b></td>
<td><b>Default Value</b></td>
</tr>
</tr>
<tr>
<tr>
<td>-xe</td>
<td><font color=gray>-xe</font></td>
<td>&nbsp;</td>
<td><font color=gray>&nbsp;</font></td>
<td>n</td>
<td><font color=gray>n</font></td>
<td>None</td>
<td><font color=gray>None</font></td>
</tr>
</tr>
<tr>
<tr>
<td>-intstyle</td>
<td><font color=gray>-intstyle</font></td>
<td>&nbsp;</td>
<td><font color=gray>&nbsp;</font></td>
<td>ise</td>
<td><font color=gray>ise</font></td>
<td>&nbsp;</td>
<td><font color=gray>&nbsp;</font></td>
</tr>
</tr>
<tr>
<tr>
<td>-mt</td>
<td><font color=gray>-mt</font></td>
<td>Enable Multi-Threading</td>
<td><font color=gray>Enable Multi-Threading</font></td>
<td>4</td>
<td><font color=gray>4</font></td>
<td>off</td>
<td><font color=gray>off</font></td>
</tr>
</tr>
<tr>
<tr>
<td>-ol</td>
<td><font color=gray>-ol</font></td>
<td>Place & Route Effort Level (Overall)</td>
<td><font color=gray>Place & Route Effort Level (Overall)</font></td>
<td>high</td>
<td><font color=gray>high</font></td>
<td>std</td>
<td><font color=gray>std</font></td>
</tr>
</tr>
<tr>
<tr>
<td>-w</td>
<td><font color=gray>-w</font></td>
<td>&nbsp;</td>
<td><font color=gray>&nbsp;</font></td>
<td>true</td>
<td><font color=gray>true</font></td>
<td>false</td>
<td><font color=gray>false</font></td>
</tr>
</tr>
</TABLE>
</TABLE>
<A NAME="Operating System Information"></A>
<A NAME="Operating System Information"></A>
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
Line 537... Line 537...
<td><b>par</b></td>
<td><b>par</b></td>
</tr>
</tr>
<tr>
<tr>
<td>CPU Architecture/Speed</td>
<td>CPU Architecture/Speed</td>
<td>Intel(R) Core(TM) i7 CPU         950  @ 3.07GHz/3066 MHz</td>
<td>Intel(R) Core(TM) i7 CPU         950  @ 3.07GHz/3066 MHz</td>
<td>Intel(R) Core(TM) i7 CPU         950  @ 3.07GHz/3066 MHz</td>
<td><font color=gray>Intel(R) Core(TM) i7 CPU         950  @ 3.07GHz/3066 MHz</font></td>
<td>Intel(R) Core(TM) i7 CPU         950  @ 3.07GHz/3066 MHz</td>
<td><font color=gray>Intel(R) Core(TM) i7 CPU         950  @ 3.07GHz/3066 MHz</font></td>
<td>Intel(R) Core(TM) i7 CPU         950  @ 3.07GHz/3066 MHz</td>
<td><font color=gray>Intel(R) Core(TM) i7 CPU         950  @ 3.07GHz/3066 MHz</font></td>
</tr>
</tr>
<tr>
<tr>
<td>Host</td>
<td>Host</td>
<td>Develop-W7</td>
<td>Develop-W7</td>
<td>Develop-W7</td>
<td><font color=gray>Develop-W7</font></td>
<td>Develop-W7</td>
<td><font color=gray>Develop-W7</font></td>
<td>Develop-W7</td>
<td><font color=gray>Develop-W7</font></td>
</tr>
</tr>
<tr>
<tr>
<td>OS Name</td>
<td>OS Name</td>
<td>Microsoft Windows 7 , 32-bit</td>
<td>Microsoft Windows 7 , 32-bit</td>
<td>Microsoft Windows 7 , 32-bit</td>
<td><font color=gray>Microsoft Windows 7 , 32-bit</font></td>
<td>Microsoft Windows 7 , 32-bit</td>
<td><font color=gray>Microsoft Windows 7 , 32-bit</font></td>
<td>Microsoft Windows 7 , 32-bit</td>
<td><font color=gray>Microsoft Windows 7 , 32-bit</font></td>
</tr>
</tr>
<tr>
<tr>
<td>OS Release</td>
<td>OS Release</td>
<td>Service Pack 1  (build 7601)</td>
<td>Service Pack 1  (build 7601)</td>
<td>Service Pack 1  (build 7601)</td>
<td><font color=gray>Service Pack 1  (build 7601)</font></td>
<td>Service Pack 1  (build 7601)</td>
<td><font color=gray>Service Pack 1  (build 7601)</font></td>
<td>Service Pack 1  (build 7601)</td>
<td><font color=gray>Service Pack 1  (build 7601)</font></td>
</tr>
</tr>
</TABLE>
</TABLE>
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