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[/] [thor/] [trunk/] [FT64v7/] [rtl/] [twoway/] [FT64_fetchbuf_x1.v] - Diff between revs 61 and 66
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Rev 61 |
Rev 66 |
Line 112... |
Line 112... |
output reg [3:0] panic;
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output reg [3:0] panic;
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integer n;
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integer n;
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reg [55:0] cinsn0;
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reg [55:0] cinsn0;
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wire iclk = clk;
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//BUFH ucb1 (.I(clk), .O(iclk));
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//`include "FT64_decode.vh"
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//`include "FT64_decode.vh"
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function IsBranch;
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function IsBranch;
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input [47:0] isn;
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input [47:0] isn;
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casex(isn[`INSTRUCTION_OP])
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casex(isn[`INSTRUCTION_OP])
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Line 334... |
Line 337... |
wire peclk, neclk;
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wire peclk, neclk;
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edge_det ued1 (.rst(rst), .clk(clk4x), .ce(1'b1), .i(clk), .pe(peclk), .ne(neclk), .ee());
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edge_det ued1 (.rst(rst), .clk(clk4x), .ce(1'b1), .i(clk), .pe(peclk), .ne(neclk), .ee());
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reg did_branch;
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reg did_branch;
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always @(posedge clk)
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always @(posedge iclk)
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if (rst) begin
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if (rst) begin
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pc0 <= RSTPC;
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pc0 <= RSTPC;
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fetchbufA_v <= 1'b0;
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fetchbufA_v <= 1'b0;
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fetchbufB_v <= 1'b0;
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fetchbufB_v <= 1'b0;
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fetchbuf <= 1'b0;
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fetchbuf <= 1'b0;
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Line 530... |
Line 533... |
fetchbufA_instr <= pred_on ? cinsn0[55:8] : cinsn0[47:0];
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fetchbufA_instr <= pred_on ? cinsn0[55:8] : cinsn0[47:0];
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fetchbufA_pbyte = cinsn0[7:0];
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fetchbufA_pbyte = cinsn0[7:0];
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fetchbufA_v <= `VAL;
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fetchbufA_v <= `VAL;
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fetchbufA_pc <= pc0;
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fetchbufA_pc <= pc0;
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if (phit && ~freezePC)
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if (phit && ~freezePC)
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pc0 <= pc0 + insln0;
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pc0[31:0] <= pc0[31:0] + insln0;
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else
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// else
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pc0 <= pc0;
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// pc0 <= pc0;
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end
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end
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endtask
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endtask
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task FetchB;
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task FetchB;
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begin
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begin
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fetchbufB_instr <= pred_on ? cinsn0[55:8] : cinsn0[47:0];
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fetchbufB_instr <= pred_on ? cinsn0[55:8] : cinsn0[47:0];
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fetchbufB_pbyte = cinsn0[7:0];
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fetchbufB_pbyte = cinsn0[7:0];
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fetchbufB_v <= `VAL;
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fetchbufB_v <= `VAL;
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fetchbufB_pc <= pc0;
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fetchbufB_pc <= pc0;
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if (phit && ~freezePC)
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if (phit && ~freezePC)
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pc0 <= pc0 + insln0;
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pc0[31:0] <= pc0[31:0] + insln0;
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else
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// else
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pc0 <= pc0;
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// pc0 <= pc0;
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end
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end
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endtask
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endtask
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endmodule
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endmodule
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