Subversion Repositories udp_ip_stack

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-- Company: 

-- Company: 

-- Engineer:

-- Engineer:

--

--

-- Create Date:   09:57:01 06/13/2011

-- Create Date:   09:57:01 06/13/2011

-- Design Name:   

-- Design Name:   

-- Module Name:   C:/Users/pjf/Documents/projects/fpga/xilinx/Network/udp1/UDP_complete_nomac_tb.vhd

-- Module Name:   C:/Users/pjf/Documents/projects/fpga/xilinx/Network/udp1/UDP_complete_nomac_tb.vhd

-- Project Name:  udp1

-- Project Name:  udp1

-- Target Device:  

-- Target Device:  

-- Tool versions:  

-- Tool versions:  

-- Description:   

-- Description:   

-- 

-- 

-- VHDL Test Bench Created by ISE for module: UDP_Complete_nomac

-- VHDL Test Bench Created by ISE for module: UDP_Complete_nomac

-- 

-- 

-- Dependencies:

-- Dependencies:

-- 

-- 

-- Revision:

-- Revision:

-- Revision 0.01 - File Created

-- Revision 0.01 - File Created

-- Revision 0.02 - Added test for IP broadcast tx

-- Revision 0.02 - Added test for IP broadcast tx

-- Revision 0.03 - Added tests for ARP timeout

-- Revision 0.03 - Added tests for ARP timeout

-- Additional Comments:

-- Additional Comments:

--

--

-- Notes: 

-- Notes: 

-- This testbench has been automatically generated using types std_logic and

-- This testbench has been automatically generated using types std_logic and

-- std_logic_vector for the ports of the unit under test.  Xilinx recommends

-- std_logic_vector for the ports of the unit under test.  Xilinx recommends

-- that these types always be used for the top-level I/O of a design in order

-- that these types always be used for the top-level I/O of a design in order

-- to guarantee that the testbench will bind correctly to the post-implementation 

-- to guarantee that the testbench will bind correctly to the post-implementation 

-- simulation model.

-- simulation model.

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library IEEE;

library IEEE;

use IEEE.STD_LOGIC_1164.ALL;

use IEEE.STD_LOGIC_1164.ALL;

use IEEE.NUMERIC_STD.ALL;

use IEEE.NUMERIC_STD.ALL;

use work.axi.all;

use work.axi.all;

use work.ipv4_types.all;

use work.ipv4_types.all;

use work.arp_types.all;

use work.arp_types.all;

ENTITY UDP_complete_nomac_tb IS

ENTITY UDP_complete_nomac_tb IS

END UDP_complete_nomac_tb;

END UDP_complete_nomac_tb;

ARCHITECTURE behavior OF UDP_complete_nomac_tb IS

ARCHITECTURE behavior OF UDP_complete_nomac_tb IS

    -- Component Declaration for the Unit Under Test (UUT)

    -- Component Declaration for the Unit Under Test (UUT)

    COMPONENT UDP_Complete_nomac

    COMPONENT UDP_Complete_nomac

         generic (

         generic (

                        CLOCK_FREQ                      : integer := 125000000;                                                 -- freq of data_in_clk -- needed to timout cntr

                        CLOCK_FREQ                      : integer := 125000000;                                                 -- freq of data_in_clk -- needed to timout cntr

                        ARP_TIMEOUT                     : integer := 60                                                                 -- ARP response timeout (s)

                        ARP_TIMEOUT                     : integer := 60                                                                 -- ARP response timeout (s)

                        );

                        );

    Port (

    Port (

                        -- UDP TX signals

                        -- UDP TX signals

                        udp_tx_start                    : in std_logic;                                                 -- indicates req to tx UDP

                        udp_tx_start                    : in std_logic;                                                 -- indicates req to tx UDP

                        udp_txi                                 : in udp_tx_type;                                                       -- UDP tx cxns

                        udp_txi                                 : in udp_tx_type;                                                       -- UDP tx cxns

                        udp_tx_result                   : out std_logic_vector (1 downto 0);-- tx status (changes during transmission)

                        udp_tx_result                   : out std_logic_vector (1 downto 0);-- tx status (changes during transmission)

                        udp_tx_data_out_ready: out std_logic;                                                   -- indicates udp_tx is ready to take data

                        udp_tx_data_out_ready: out std_logic;                                                   -- indicates udp_tx is ready to take data

                        -- UDP RX signals

                        -- UDP RX signals

                        udp_rx_start                    : out std_logic;                                                        -- indicates receipt of udp header

                        udp_rx_start                    : out std_logic;                                                        -- indicates receipt of udp header

                        udp_rxo                                 : out udp_rx_type;

                        udp_rxo                                 : out udp_rx_type;

                        -- IP RX signals

                        -- IP RX signals

                        ip_rx_hdr                               : out ipv4_rx_header_type;

                        ip_rx_hdr                               : out ipv4_rx_header_type;

                        -- system signals

                        -- system signals

                        rx_clk                                  : in  STD_LOGIC;

                        rx_clk                                  : in  STD_LOGIC;

                        tx_clk                                  : in  STD_LOGIC;

                        tx_clk                                  : in  STD_LOGIC;

                        reset                                   : in  STD_LOGIC;

                        reset                                   : in  STD_LOGIC;

                        our_ip_address          : in STD_LOGIC_VECTOR (31 downto 0);

                        our_ip_address          : in STD_LOGIC_VECTOR (31 downto 0);

                        our_mac_address                 : in std_logic_vector (47 downto 0);

                        our_mac_address                 : in std_logic_vector (47 downto 0);

                        control                                 : in udp_control_type;

                        control                                 : in udp_control_type;

                        -- status signals

                        -- status signals

                        arp_pkt_count                   : out STD_LOGIC_VECTOR(7 downto 0);                      -- count of arp pkts received

                        arp_pkt_count                   : out STD_LOGIC_VECTOR(7 downto 0);                      -- count of arp pkts received

                        ip_pkt_count                    : out STD_LOGIC_VECTOR(7 downto 0);                      -- number of IP pkts received for us

                        ip_pkt_count                    : out STD_LOGIC_VECTOR(7 downto 0);                      -- number of IP pkts received for us

                        -- MAC Transmitter

                        -- MAC Transmitter

                        mac_tx_tdata         : out  std_logic_vector(7 downto 0);        -- data byte to tx

                        mac_tx_tdata         : out  std_logic_vector(7 downto 0);        -- data byte to tx

                        mac_tx_tvalid        : out  std_logic;                                                  -- tdata is valid

                        mac_tx_tvalid        : out  std_logic;                                                  -- tdata is valid

                        mac_tx_tready        : in std_logic;                                                    -- mac is ready to accept data

                        mac_tx_tready        : in std_logic;                                                    -- mac is ready to accept data

                        mac_tx_tfirst        : out  std_logic;                                                  -- indicates first byte of frame

                        mac_tx_tfirst        : out  std_logic;                                                  -- indicates first byte of frame

                        mac_tx_tlast         : out  std_logic;                                                  -- indicates last byte of frame

                        mac_tx_tlast         : out  std_logic;                                                  -- indicates last byte of frame

                        -- MAC Receiver

                        -- MAC Receiver

                        mac_rx_tdata         : in std_logic_vector(7 downto 0);  -- data byte received

                        mac_rx_tdata         : in std_logic_vector(7 downto 0);  -- data byte received

                        mac_rx_tvalid        : in std_logic;                                                    -- indicates tdata is valid

                        mac_rx_tvalid        : in std_logic;                                                    -- indicates tdata is valid

                        mac_rx_tready        : out  std_logic;                                                  -- tells mac that we are ready to take data

                        mac_rx_tready        : out  std_logic;                                                  -- tells mac that we are ready to take data

                        mac_rx_tlast         : in std_logic                                                             -- indicates last byte of the trame

                        mac_rx_tlast         : in std_logic                                                             -- indicates last byte of the trame

                        );

                        );

    END COMPONENT;

    END COMPONENT;

        type state_type is (IDLE, WAIT_RX_DONE, DATA_OUT);

        type state_type is (IDLE, WAIT_RX_DONE, DATA_OUT);

        type count_mode_type is (RST, INCR, HOLD);

        type count_mode_type is (RST, INCR, HOLD);

        type set_clr_type is (SET, CLR, HOLD);

        type set_clr_type is (SET, CLR, HOLD);

   --Inputs

   --Inputs

   signal udp_tx_start_int : std_logic := '0';

   signal udp_tx_start_int : std_logic := '0';

   signal udp_tx_int : udp_tx_type;

   signal udp_tx_int : udp_tx_type;

   signal clk_int : std_logic := '0';

   signal clk_int : std_logic := '0';

   signal reset : std_logic := '0';

   signal reset : std_logic := '0';

   signal our_ip_address : std_logic_vector(31 downto 0) := (others => '0');

   signal our_ip_address : std_logic_vector(31 downto 0) := (others => '0');

   signal our_mac_address : std_logic_vector(47 downto 0) := (others => '0');

   signal our_mac_address : std_logic_vector(47 downto 0) := (others => '0');

   signal mac_tx_tready : std_logic := '0';

   signal mac_tx_tready : std_logic := '0';

   signal mac_rx_tdata : std_logic_vector(7 downto 0) := (others => '0');

   signal mac_rx_tdata : std_logic_vector(7 downto 0) := (others => '0');

   signal mac_rx_tvalid : std_logic := '0';

   signal mac_rx_tvalid : std_logic := '0';

   signal mac_rx_tlast : std_logic := '0';

   signal mac_rx_tlast : std_logic := '0';

        signal control                  : udp_control_type;

        signal control                  : udp_control_type;

        --Outputs

        --Outputs

   signal udp_rx_start_int : std_logic;

   signal udp_rx_start_int : std_logic;

   signal udp_rx_int : udp_rx_type;

   signal udp_rx_int : udp_rx_type;

   signal ip_rx_hdr : ipv4_rx_header_type;

   signal ip_rx_hdr : ipv4_rx_header_type;

        signal udp_tx_result    : std_logic_vector (1 downto 0);

        signal udp_tx_result    : std_logic_vector (1 downto 0);

        signal udp_tx_data_out_ready_int: std_logic;

        signal udp_tx_data_out_ready_int: std_logic;

   signal arp_pkt_count : std_logic_vector(7 downto 0);

   signal arp_pkt_count : std_logic_vector(7 downto 0);

   signal ip_pkt_count : std_logic_vector(7 downto 0);

   signal ip_pkt_count : std_logic_vector(7 downto 0);

   signal mac_tx_tdata : std_logic_vector(7 downto 0);

   signal mac_tx_tdata : std_logic_vector(7 downto 0);

   signal mac_tx_tvalid : std_logic;

   signal mac_tx_tvalid : std_logic;

   signal mac_tx_tfirst : std_logic;

   signal mac_tx_tfirst : std_logic;

   signal mac_tx_tlast : std_logic;

   signal mac_tx_tlast : std_logic;

   signal mac_rx_tready : std_logic;

   signal mac_rx_tready : std_logic;

        signal pbtx_led : std_logic;

        signal pbtx_led : std_logic;

        signal pbtx : std_logic := '0';

        signal pbtx : std_logic := '0';

        -- state signals

        -- state signals

        signal state                    : state_type;

        signal state                    : state_type;

        signal count                    : unsigned (7 downto 0);

        signal count                    : unsigned (7 downto 0);

        signal tx_hdr                   : udp_tx_header_type;

        signal tx_hdr                   : udp_tx_header_type;

        signal tx_start_reg     : std_logic;

        signal tx_start_reg     : std_logic;

        signal tx_started_reg : std_logic;

        signal tx_started_reg : std_logic;

        signal tx_fin_reg               : std_logic;

        signal tx_fin_reg               : std_logic;

        -- control signals

        -- control signals

        signal next_state               : state_type;

        signal next_state               : state_type;

        signal set_state                : std_logic;

        signal set_state                : std_logic;

        signal set_count                : count_mode_type;

        signal set_count                : count_mode_type;

        signal set_hdr                  : std_logic;

        signal set_hdr                  : std_logic;

        signal set_tx_start     : set_clr_type;

        signal set_tx_start     : set_clr_type;

        signal set_last         : std_logic;

        signal set_last         : std_logic;

        signal set_tx_started : set_clr_type;

        signal set_tx_started : set_clr_type;

        signal set_tx_fin       : set_clr_type;

        signal set_tx_fin       : set_clr_type;

        signal first_byte_rx    : STD_LOGIC_VECTOR(7 downto 0);

        signal first_byte_rx    : STD_LOGIC_VECTOR(7 downto 0);

   -- Clock period definitions

   -- Clock period definitions

   constant clk_period : time := 8 ns;

   constant clk_period : time := 8 ns;

BEGIN

BEGIN

        -- Instantiate the Unit Under Test (UUT)

        -- Instantiate the Unit Under Test (UUT)

   uut: UDP_Complete_nomac

   uut: UDP_Complete_nomac

                        generic map (

                        generic map (

                         CLOCK_FREQ                     => 10,                                          -- artificially low count to enable pragmatic testing

                         CLOCK_FREQ                     => 10,                                          -- artificially low count to enable pragmatic testing

                         ARP_TIMEOUT            => 20

                         ARP_TIMEOUT            => 20

                         )

                         )

                         PORT MAP (

                         PORT MAP (

          udp_tx_start => udp_tx_start_int,

          udp_tx_start => udp_tx_start_int,

          udp_txi => udp_tx_int,

          udp_txi => udp_tx_int,

          udp_tx_result => udp_tx_result,

          udp_tx_result => udp_tx_result,

          udp_tx_data_out_ready => udp_tx_data_out_ready_int,

          udp_tx_data_out_ready => udp_tx_data_out_ready_int,

          udp_rx_start => udp_rx_start_int,

          udp_rx_start => udp_rx_start_int,

          udp_rxo => udp_rx_int,

          udp_rxo => udp_rx_int,

          ip_rx_hdr => ip_rx_hdr,

          ip_rx_hdr => ip_rx_hdr,

          rx_clk => clk_int,

          rx_clk => clk_int,

                         tx_clk => clk_int,

                         tx_clk => clk_int,

          reset => reset,

          reset => reset,

          our_ip_address => our_ip_address,

          our_ip_address => our_ip_address,

          our_mac_address => our_mac_address,

          our_mac_address => our_mac_address,

                         control => control,

                         control => control,

          arp_pkt_count => arp_pkt_count,

          arp_pkt_count => arp_pkt_count,

          ip_pkt_count => ip_pkt_count,

          ip_pkt_count => ip_pkt_count,

          mac_tx_tdata => mac_tx_tdata,

          mac_tx_tdata => mac_tx_tdata,

          mac_tx_tvalid => mac_tx_tvalid,

          mac_tx_tvalid => mac_tx_tvalid,

          mac_tx_tready => mac_tx_tready,

          mac_tx_tready => mac_tx_tready,

          mac_tx_tfirst => mac_tx_tfirst,

          mac_tx_tfirst => mac_tx_tfirst,

          mac_tx_tlast => mac_tx_tlast,

          mac_tx_tlast => mac_tx_tlast,

          mac_rx_tdata => mac_rx_tdata,

          mac_rx_tdata => mac_rx_tdata,

          mac_rx_tvalid => mac_rx_tvalid,

          mac_rx_tvalid => mac_rx_tvalid,

          mac_rx_tready => mac_rx_tready,

          mac_rx_tready => mac_rx_tready,

          mac_rx_tlast => mac_rx_tlast

          mac_rx_tlast => mac_rx_tlast

        );

        );

   -- Clock process definitions

   -- Clock process definitions

   clk_process :process

   clk_process :process

   begin

   begin

                clk_int <= '0';

                clk_int <= '0';

                wait for clk_period/2;

                wait for clk_period/2;

                clk_int <= '1';

                clk_int <= '1';

                wait for clk_period/2;

                wait for clk_period/2;

   end process;

   end process;

   -- Stimulus process

   -- Stimulus process

   stim_proc: process

   stim_proc: process

   begin

   begin

      -- hold reset state for 100 ns.

      -- hold reset state for 100 ns.

      wait for 100 ns;

      wait for 100 ns;

                our_ip_address <= x"c0a80509";          -- 192.168.5.9

                our_ip_address <= x"c0a80509";          -- 192.168.5.9

                our_mac_address <= x"002320212223";

                our_mac_address <= x"002320212223";

                control.ip_controls.arp_controls.clear_cache <= '0';

                control.ip_controls.arp_controls.clear_cache <= '0';

      mac_tx_tready <= '0';

      mac_tx_tready <= '0';

                reset <= '1';

                reset <= '1';

      wait for clk_period*10;

      wait for clk_period*10;

                reset <= '0';

                reset <= '0';

      wait for clk_period*5;

      wait for clk_period*5;

                -- check reset conditions

                -- check reset conditions

                assert udp_tx_result = UDPTX_RESULT_NONE                report "udp_tx_result not initialised correctly on reset";

                assert udp_tx_result = UDPTX_RESULT_NONE                report "udp_tx_result not initialised correctly on reset";

                assert udp_tx_data_out_ready_int = '0'           report "ip_udp_txitx.data.data_out_ready not initialised correctly on reset";

                assert udp_tx_data_out_ready_int = '0'           report "ip_udp_txitx.data.data_out_ready not initialised correctly on reset";

                assert mac_tx_tvalid = '0'                                               report "mac_tx_tvalid not initialised correctly on reset";

                assert mac_tx_tvalid = '0'                                               report "mac_tx_tvalid not initialised correctly on reset";

                assert mac_tx_tlast = '0'                                                        report "mac_tx_tlast not initialised correctly on reset";

                assert mac_tx_tlast = '0'                                                        report "mac_tx_tlast not initialised correctly on reset";

                assert arp_pkt_count = x"00"                                            report "arp_pkt_count not initialised correctly on reset";

                assert arp_pkt_count = x"00"                                            report "arp_pkt_count not initialised correctly on reset";

                assert ip_pkt_count = x"00"                                             report "ip_pkt_count not initialised correctly on reset";

                assert ip_pkt_count = x"00"                                             report "ip_pkt_count not initialised correctly on reset";

                assert udp_rx_start_int = '0'                                                    report "udp_rx_start not initialised correctly on reset";

                assert udp_rx_start_int = '0'                                                    report "udp_rx_start not initialised correctly on reset";

                assert udp_rx_int.hdr.is_valid = '0'                             report "udp_rx_int.hdr.is_valid not initialised correctly on reset";

                assert udp_rx_int.hdr.is_valid = '0'                             report "udp_rx_int.hdr.is_valid not initialised correctly on reset";

                assert udp_rx_int.hdr.data_length = x"0000"             report "udp_rx_int.hdr.data_length not initialised correctly on reset";

                assert udp_rx_int.hdr.data_length = x"0000"             report "udp_rx_int.hdr.data_length not initialised correctly on reset";

                assert udp_rx_int.hdr.src_ip_addr = x"00000000" report "udp_rx_int.hdr.src_ip_addr not initialised correctly on reset";

                assert udp_rx_int.hdr.src_ip_addr = x"00000000" report "udp_rx_int.hdr.src_ip_addr not initialised correctly on reset";

                assert udp_rx_int.hdr.src_port = x"0000"                        report "udp_rx_int.hdr.src_port not initialised correctly on reset";

                assert udp_rx_int.hdr.src_port = x"0000"                        report "udp_rx_int.hdr.src_port not initialised correctly on reset";

                assert udp_rx_int.hdr.dst_port = x"0000"                        report "udp_rx_int.hdr.dst_port not initialised correctly on reset";

                assert udp_rx_int.hdr.dst_port = x"0000"                        report "udp_rx_int.hdr.dst_port not initialised correctly on reset";

                assert udp_rx_int.data.data_in = x"00"                          report "udp_rx_start.data.data_in not initialised correctly on reset";

                assert udp_rx_int.data.data_in = x"00"                          report "udp_rx_start.data.data_in not initialised correctly on reset";

                assert udp_rx_int.data.data_in_valid = '0'               report "udp_rx_start.data.data_in_valid not initialised correctly on reset";

                assert udp_rx_int.data.data_in_valid = '0'               report "udp_rx_start.data.data_in_valid not initialised correctly on reset";

                assert udp_rx_int.data.data_in_last = '0'                        report "udp_rx_start.data.data_in_last not initialised correctly on reset";

                assert udp_rx_int.data.data_in_last = '0'                        report "udp_rx_start.data.data_in_last not initialised correctly on reset";

                assert ip_rx_hdr.is_valid = '0'                                  report "ip_rx_hdr.is_valid not initialised correctly on reset";

                assert ip_rx_hdr.is_valid = '0'                                  report "ip_rx_hdr.is_valid not initialised correctly on reset";

                assert ip_rx_hdr.protocol = x"00"                               report "ip_rx_hdr.protocol not initialised correctly on reset";

                assert ip_rx_hdr.protocol = x"00"                               report "ip_rx_hdr.protocol not initialised correctly on reset";

                assert ip_rx_hdr.data_length = x"0000"                  report "ip_rx_hdr.data_length not initialised correctly on reset";

                assert ip_rx_hdr.data_length = x"0000"                  report "ip_rx_hdr.data_length not initialised correctly on reset";

                assert ip_rx_hdr.src_ip_addr = x"00000000"      report "ip_rx_hdr.src_ip_addr not initialised correctly on reset";

                assert ip_rx_hdr.src_ip_addr = x"00000000"      report "ip_rx_hdr.src_ip_addr not initialised correctly on reset";

                assert ip_rx_hdr.num_frame_errors = x"00"               report "ip_rx_hdr.num_frame_errors not initialised correctly on reset";

                assert ip_rx_hdr.num_frame_errors = x"00"               report "ip_rx_hdr.num_frame_errors not initialised correctly on reset";

      -- insert stimulus here 

      -- insert stimulus here 

                ------------

                ------------

                -- TEST 1 -- send ARP request

                -- TEST 1 -- send ARP request

                ------------

                ------------

                report "T1: Send an ARP request: who has 192.168.5.9? Tell 192.168.5.1";

                report "T1: Send an ARP request: who has 192.168.5.9? Tell 192.168.5.1";

      mac_tx_tready <= '1';

      mac_tx_tready <= '1';

                mac_rx_tvalid <= '1';

                mac_rx_tvalid <= '1';

                -- dst MAC (bc)

                -- dst MAC (bc)

                mac_rx_tdata <= x"ff"; wait for clk_period;

                mac_rx_tdata <= x"ff"; wait for clk_period;

                mac_rx_tdata <= x"ff"; wait for clk_period;

                mac_rx_tdata <= x"ff"; wait for clk_period;

                mac_rx_tdata <= x"ff"; wait for clk_period;

                mac_rx_tdata <= x"ff"; wait for clk_period;

                mac_rx_tdata <= x"ff"; wait for clk_period;

                mac_rx_tdata <= x"ff"; wait for clk_period;

                mac_rx_tdata <= x"ff"; wait for clk_period;

                mac_rx_tdata <= x"ff"; wait for clk_period;

                mac_rx_tdata <= x"ff"; wait for clk_period;

                mac_rx_tdata <= x"ff"; wait for clk_period;

                -- src MAC

                -- src MAC

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"23"; wait for clk_period;

                mac_rx_tdata <= x"23"; wait for clk_period;

                mac_rx_tdata <= x"18"; wait for clk_period;

                mac_rx_tdata <= x"18"; wait for clk_period;

                mac_rx_tdata <= x"29"; wait for clk_period;

                mac_rx_tdata <= x"29"; wait for clk_period;

                mac_rx_tdata <= x"26"; wait for clk_period;

                mac_rx_tdata <= x"26"; wait for clk_period;

                mac_rx_tdata <= x"7c"; wait for clk_period;

                mac_rx_tdata <= x"7c"; wait for clk_period;

                -- type

                -- type

                mac_rx_tdata <= x"08"; wait for clk_period;

                mac_rx_tdata <= x"08"; wait for clk_period;

                mac_rx_tdata <= x"06"; wait for clk_period;

                mac_rx_tdata <= x"06"; wait for clk_period;

                -- HW type

                -- HW type

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"01"; wait for clk_period;

                mac_rx_tdata <= x"01"; wait for clk_period;

                -- Protocol type

                -- Protocol type

                mac_rx_tdata <= x"08"; wait for clk_period;

                mac_rx_tdata <= x"08"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                -- HW size

                -- HW size

                mac_rx_tdata <= x"06"; wait for clk_period;

                mac_rx_tdata <= x"06"; wait for clk_period;

                -- protocol size

                -- protocol size

                mac_rx_tdata <= x"04"; wait for clk_period;

                mac_rx_tdata <= x"04"; wait for clk_period;

                -- Opcode

                -- Opcode

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"01"; wait for clk_period;

                mac_rx_tdata <= x"01"; wait for clk_period;

                -- Sender MAC

                -- Sender MAC

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"23"; wait for clk_period;

                mac_rx_tdata <= x"23"; wait for clk_period;

                mac_rx_tdata <= x"18"; wait for clk_period;

                mac_rx_tdata <= x"18"; wait for clk_period;

                mac_rx_tdata <= x"29"; wait for clk_period;

                mac_rx_tdata <= x"29"; wait for clk_period;

                mac_rx_tdata <= x"26"; wait for clk_period;

                mac_rx_tdata <= x"26"; wait for clk_period;

                mac_rx_tdata <= x"7c"; wait for clk_period;

                mac_rx_tdata <= x"7c"; wait for clk_period;

                -- Sender IP

                -- Sender IP

                mac_rx_tdata <= x"c0"; wait for clk_period;

                mac_rx_tdata <= x"c0"; wait for clk_period;

                mac_rx_tdata <= x"a8"; wait for clk_period;

                mac_rx_tdata <= x"a8"; wait for clk_period;

                mac_rx_tdata <= x"05"; wait for clk_period;

                mac_rx_tdata <= x"05"; wait for clk_period;

                mac_rx_tdata <= x"01"; wait for clk_period;

                mac_rx_tdata <= x"01"; wait for clk_period;

                -- Target MAC

                -- Target MAC

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                -- Target IP

                -- Target IP

                mac_rx_tdata <= x"c0"; wait for clk_period;

                mac_rx_tdata <= x"c0"; wait for clk_period;

                mac_rx_tdata <= x"a8"; wait for clk_period;

                mac_rx_tdata <= x"a8"; wait for clk_period;

                mac_rx_tdata <= x"05"; wait for clk_period;

                mac_rx_tdata <= x"05"; wait for clk_period;

                mac_rx_tdata <= x"09"; wait for clk_period;

                mac_rx_tdata <= x"09"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tlast <= '1';

                mac_rx_tlast <= '1';

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tlast <= '0';

                mac_rx_tlast <= '0';

                mac_rx_tvalid <= '0';

                mac_rx_tvalid <= '0';

                -- check we got the ARP pkt

                -- check we got the ARP pkt

                assert arp_pkt_count = x"01"                                            report "T1: arp_pkt_count wrong value";

                assert arp_pkt_count = x"01"                                            report "T1: arp_pkt_count wrong value";

                assert ip_pkt_count = x"00"                                             report "T1: ip_pkt_count wrong value";

                assert ip_pkt_count = x"00"                                             report "T1: ip_pkt_count wrong value";

                assert udp_tx_result = UDPTX_RESULT_NONE                report "T1: udp_tx_result wrong value";

                assert udp_tx_result = UDPTX_RESULT_NONE                report "T1: udp_tx_result wrong value";

                assert udp_tx_data_out_ready_int = '0'           report "T1: ip_udp_txitx.data.data_out_ready wrong value";

                assert udp_tx_data_out_ready_int = '0'           report "T1: ip_udp_txitx.data.data_out_ready wrong value";

                assert udp_rx_start_int = '0'                                                    report "T1: udp_rx_start wrong value";

                assert udp_rx_start_int = '0'                                                    report "T1: udp_rx_start wrong value";

                assert udp_rx_int.hdr.is_valid = '0'                             report "T1: udp_rx_int.hdr.is_valid wrong value";

                assert udp_rx_int.hdr.is_valid = '0'                             report "T1: udp_rx_int.hdr.is_valid wrong value";

                assert ip_rx_hdr.is_valid = '0'                                  report "T1: ip_rx_hdr.is_valid wrong value";

                assert ip_rx_hdr.is_valid = '0'                                  report "T1: ip_rx_hdr.is_valid wrong value";

                -- check we tx a response

                -- check we tx a response

                wait for clk_period*25;

                wait for clk_period*25;

                assert mac_tx_tvalid = '1'                                                      report "T1: not transmitting a response";

                assert mac_tx_tvalid = '1'                                                      report "T1: not transmitting a response";

                wait for clk_period*25;

                wait for clk_period*25;

                assert mac_tx_tvalid = '0'                                                       report "T1: tx held on for too long";

                assert mac_tx_tvalid = '0'                                                       report "T1: tx held on for too long";

                ------------

                ------------

                -- TEST 2 -- send UDP pkt (same as sample from Java program)

                -- TEST 2 -- send UDP pkt (same as sample from Java program)

                ------------

                ------------

                report "T2: Send UDP IP pkt dst ip_address c0a80509, from port f49a to port 2694";

                report "T2: Send UDP IP pkt dst ip_address c0a80509, from port f49a to port 2694";

                mac_rx_tvalid <= '1';

                mac_rx_tvalid <= '1';

                -- dst MAC (bc)

                -- dst MAC (bc)

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"23"; wait for clk_period;

                mac_rx_tdata <= x"23"; wait for clk_period;

                mac_rx_tdata <= x"20"; wait for clk_period;

                mac_rx_tdata <= x"20"; wait for clk_period;

                mac_rx_tdata <= x"21"; wait for clk_period;

                mac_rx_tdata <= x"21"; wait for clk_period;

                mac_rx_tdata <= x"22"; wait for clk_period;

                mac_rx_tdata <= x"22"; wait for clk_period;

                mac_rx_tdata <= x"23"; wait for clk_period;

                mac_rx_tdata <= x"23"; wait for clk_period;

                -- src MAC

                -- src MAC

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"23"; wait for clk_period;

                mac_rx_tdata <= x"23"; wait for clk_period;

                mac_rx_tdata <= x"18"; wait for clk_period;

                mac_rx_tdata <= x"18"; wait for clk_period;

                mac_rx_tdata <= x"29"; wait for clk_period;

                mac_rx_tdata <= x"29"; wait for clk_period;

                mac_rx_tdata <= x"26"; wait for clk_period;

                mac_rx_tdata <= x"26"; wait for clk_period;

                mac_rx_tdata <= x"7c"; wait for clk_period;

                mac_rx_tdata <= x"7c"; wait for clk_period;

                -- type

                -- type

                mac_rx_tdata <= x"08"; wait for clk_period;             -- IP pkt

                mac_rx_tdata <= x"08"; wait for clk_period;             -- IP pkt

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                -- ver & HL / service type

                -- ver & HL / service type

                mac_rx_tdata <= x"45"; wait for clk_period;

                mac_rx_tdata <= x"45"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                -- total len

                -- total len

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"21"; wait for clk_period;

                mac_rx_tdata <= x"21"; wait for clk_period;

                -- ID

                -- ID

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"7a"; wait for clk_period;

                mac_rx_tdata <= x"7a"; wait for clk_period;

                -- flags & frag

                -- flags & frag

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                -- TTL

                -- TTL

                mac_rx_tdata <= x"80"; wait for clk_period;

                mac_rx_tdata <= x"80"; wait for clk_period;

                -- Protocol

                -- Protocol

                mac_rx_tdata <= x"11"; wait for clk_period;

                mac_rx_tdata <= x"11"; wait for clk_period;

                -- Header CKS

                -- Header CKS

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                -- SRC IP

                -- SRC IP

                mac_rx_tdata <= x"c0"; wait for clk_period;

                mac_rx_tdata <= x"c0"; wait for clk_period;

                mac_rx_tdata <= x"a8"; wait for clk_period;

                mac_rx_tdata <= x"a8"; wait for clk_period;

                mac_rx_tdata <= x"05"; wait for clk_period;

                mac_rx_tdata <= x"05"; wait for clk_period;

                mac_rx_tdata <= x"01"; wait for clk_period;

                mac_rx_tdata <= x"01"; wait for clk_period;

                -- DST IP

                -- DST IP

                mac_rx_tdata <= x"c0"; wait for clk_period;

                mac_rx_tdata <= x"c0"; wait for clk_period;

                mac_rx_tdata <= x"a8"; wait for clk_period;

                mac_rx_tdata <= x"a8"; wait for clk_period;

                mac_rx_tdata <= x"05"; wait for clk_period;

                mac_rx_tdata <= x"05"; wait for clk_period;

                mac_rx_tdata <= x"09"; wait for clk_period;

                mac_rx_tdata <= x"09"; wait for clk_period;

                -- SRC port

                -- SRC port

                mac_rx_tdata <= x"f4"; wait for clk_period;

                mac_rx_tdata <= x"f4"; wait for clk_period;

                mac_rx_tdata <= x"9a"; wait for clk_period;

                mac_rx_tdata <= x"9a"; wait for clk_period;

                -- DST port

                -- DST port

                mac_rx_tdata <= x"26"; wait for clk_period;

                mac_rx_tdata <= x"26"; wait for clk_period;

                mac_rx_tdata <= x"94"; wait for clk_period;

                mac_rx_tdata <= x"94"; wait for clk_period;

                -- length

                -- length

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"0d"; wait for clk_period;

                mac_rx_tdata <= x"0d"; wait for clk_period;

                -- cks

                -- cks

                mac_rx_tdata <= x"8b"; wait for clk_period;

                mac_rx_tdata <= x"8b"; wait for clk_period;

                mac_rx_tdata <= x"79"; wait for clk_period;

                mac_rx_tdata <= x"79"; wait for clk_period;

                -- user data

                -- user data

                mac_rx_tdata <= x"68"; wait for clk_period;

                mac_rx_tdata <= x"68"; wait for clk_period;

                -- since we are up to the user data stage, the header should be valid and the data_in_valid should be set

                -- since we are up to the user data stage, the header should be valid and the data_in_valid should be set

                assert udp_rx_int.hdr.is_valid = '1'                            report "T2: udp_rx_int.hdr.is_valid not set";

                assert udp_rx_int.hdr.is_valid = '1'                            report "T2: udp_rx_int.hdr.is_valid not set";

                assert udp_rx_int.hdr.data_length = x"0005"             report "T2: udp_rx_int.hdr.data_length not set correctly";

                assert udp_rx_int.hdr.data_length = x"0005"             report "T2: udp_rx_int.hdr.data_length not set correctly";

                assert udp_rx_int.hdr.src_ip_addr = x"c0a80501" report "T2: udp_rx_int.hdr.src_ip_addr not set correctly";

                assert udp_rx_int.hdr.src_ip_addr = x"c0a80501" report "T2: udp_rx_int.hdr.src_ip_addr not set correctly";

                assert udp_rx_int.hdr.src_port = x"f49a"                        report "T2: udp_rx_int.hdr.src_port not set correctly";

                assert udp_rx_int.hdr.src_port = x"f49a"                        report "T2: udp_rx_int.hdr.src_port not set correctly";

                assert udp_rx_int.hdr.dst_port = x"2694"                        report "T2: udp_rx_int.hdr.dst_port not set correctly";

                assert udp_rx_int.hdr.dst_port = x"2694"                        report "T2: udp_rx_int.hdr.dst_port not set correctly";

                assert udp_rx_start_int = '1'                                                   report "T2: udp_rx_start not set";

                assert udp_rx_start_int = '1'                                                   report "T2: udp_rx_start not set";

                assert udp_rx_int.data.data_in_valid = '1'              report "T2: udp_rx_int.data.data_in_valid not set";

                assert udp_rx_int.data.data_in_valid = '1'              report "T2: udp_rx_int.data.data_in_valid not set";

                assert ip_rx_hdr.is_valid = '1'                                 report "T2: ip_rx_hdr.is_valid not set";

                assert ip_rx_hdr.is_valid = '1'                                 report "T2: ip_rx_hdr.is_valid not set";

                assert ip_rx_hdr.protocol = x"11"                               report "T2: ip_rx_hdr.protocol not set correctly";

                assert ip_rx_hdr.protocol = x"11"                               report "T2: ip_rx_hdr.protocol not set correctly";

                assert ip_rx_hdr.src_ip_addr = x"c0a80501"      report "T2: ip_rx.hdr.src_ip_addr not set correctly";

                assert ip_rx_hdr.src_ip_addr = x"c0a80501"      report "T2: ip_rx.hdr.src_ip_addr not set correctly";

                assert ip_rx_hdr.num_frame_errors = x"00"       report "T2: ip_rx.hdr.num_frame_errors not set correctly";

                assert ip_rx_hdr.num_frame_errors = x"00"       report "T2: ip_rx.hdr.num_frame_errors not set correctly";

                assert ip_rx_hdr.last_error_code = x"0"          report "T2: ip_rx.hdr.last_error_code not set correctly";

                assert ip_rx_hdr.last_error_code = x"0"          report "T2: ip_rx.hdr.last_error_code not set correctly";

                -- put the rest of the user data

                -- put the rest of the user data

                mac_rx_tdata <= x"65"; wait for clk_period;

                mac_rx_tdata <= x"65"; wait for clk_period;

                mac_rx_tdata <= x"6c"; wait for clk_period;

                mac_rx_tdata <= x"6c"; wait for clk_period;

                mac_rx_tdata <= x"6c"; wait for clk_period;

                mac_rx_tdata <= x"6c"; wait for clk_period;

                mac_rx_tdata <= x"6f"; mac_rx_tlast <= '1'; wait for clk_period;

                mac_rx_tdata <= x"6f"; mac_rx_tlast <= '1'; wait for clk_period;

                assert udp_rx_int.data.data_in_last = '1'                       report "T2: udp_rx_int.data.data_in_last not set";

                assert udp_rx_int.data.data_in_last = '1'                       report "T2: udp_rx_int.data.data_in_last not set";

                mac_rx_tdata <= x"00";

                mac_rx_tdata <= x"00";

                mac_rx_tlast <= '0';

                mac_rx_tlast <= '0';

                mac_rx_tvalid <= '0';

                mac_rx_tvalid <= '0';

                wait for clk_period;

                wait for clk_period;

                assert udp_rx_int.data.data_in_valid = '0'               report "T2: udp_rx_int.data.data_in_valid not cleared";

                assert udp_rx_int.data.data_in_valid = '0'               report "T2: udp_rx_int.data.data_in_valid not cleared";

                assert udp_rx_int.data.data_in_last = '0'                        report "T2: udp_rx_int.data.data_in_last not cleared";

                assert udp_rx_int.data.data_in_last = '0'                        report "T2: udp_rx_int.data.data_in_last not cleared";

                assert udp_rx_start_int = '0'                                                    report "T2: udp_rx_start not cleared";

                assert udp_rx_start_int = '0'                                                    report "T2: udp_rx_start not cleared";

                assert ip_rx_hdr.num_frame_errors = x"00"               report "T2: ip_rx_hdr.num_frame_errors non zero at end of test";

                assert ip_rx_hdr.num_frame_errors = x"00"               report "T2: ip_rx_hdr.num_frame_errors non zero at end of test";

                assert ip_rx_hdr.last_error_code = x"0"          report "T2: ip_rx_hdr.last_error_code indicates error at end of test";

                assert ip_rx_hdr.last_error_code = x"0"          report "T2: ip_rx_hdr.last_error_code indicates error at end of test";

                assert ip_pkt_count = x"01"                                             report "T2: ip pkt cnt incorrect";

                assert ip_pkt_count = x"01"                                             report "T2: ip pkt cnt incorrect";

                wait for clk_period*20;

                wait for clk_period*20;

                ------------

                ------------

                -- TEST 3 -- send UDP pkt again (same as sample from Java program)

                -- TEST 3 -- send UDP pkt again (same as sample from Java program)

                ------------

                ------------

                report "T3: Send UDP IP pkt dst ip_address c0a80509, from port f49a to port 2694";

                report "T3: Send UDP IP pkt dst ip_address c0a80509, from port f49a to port 2694";

                mac_rx_tvalid <= '1';

                mac_rx_tvalid <= '1';

                -- dst MAC (bc)

                -- dst MAC (bc)

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"23"; wait for clk_period;

                mac_rx_tdata <= x"23"; wait for clk_period;

                mac_rx_tdata <= x"20"; wait for clk_period;

                mac_rx_tdata <= x"20"; wait for clk_period;

                mac_rx_tdata <= x"21"; wait for clk_period;

                mac_rx_tdata <= x"21"; wait for clk_period;

                mac_rx_tdata <= x"22"; wait for clk_period;

                mac_rx_tdata <= x"22"; wait for clk_period;

                mac_rx_tdata <= x"23"; wait for clk_period;

                mac_rx_tdata <= x"23"; wait for clk_period;

                -- src MAC

                -- src MAC

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"23"; wait for clk_period;

                mac_rx_tdata <= x"23"; wait for clk_period;

                mac_rx_tdata <= x"18"; wait for clk_period;

                mac_rx_tdata <= x"18"; wait for clk_period;

                mac_rx_tdata <= x"29"; wait for clk_period;

                mac_rx_tdata <= x"29"; wait for clk_period;

                mac_rx_tdata <= x"26"; wait for clk_period;

                mac_rx_tdata <= x"26"; wait for clk_period;

                mac_rx_tdata <= x"7c"; wait for clk_period;

                mac_rx_tdata <= x"7c"; wait for clk_period;

                -- type

                -- type

                mac_rx_tdata <= x"08"; wait for clk_period;             -- IP pkt

                mac_rx_tdata <= x"08"; wait for clk_period;             -- IP pkt

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                -- ver & HL / service type

                -- ver & HL / service type

                mac_rx_tdata <= x"45"; wait for clk_period;

                mac_rx_tdata <= x"45"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                -- total len

                -- total len

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"21"; wait for clk_period;

                mac_rx_tdata <= x"21"; wait for clk_period;

                -- ID

                -- ID

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"7a"; wait for clk_period;

                mac_rx_tdata <= x"7a"; wait for clk_period;

                -- flags & frag

                -- flags & frag

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                mac_rx_tdata <= x"00"; wait for clk_period;

                -- TTL

                -- TTL

                mac_rx_tdata <= x"80"; wait for clk_period;