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[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [defines.v] - Diff between revs 97 and 98

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Rev 97 Rev 98
Line 8... Line 8...
`ifdef ACTEL
`ifdef ACTEL
`undef SYN_KEEP
`undef SYN_KEEP
`define SYN_KEEP /*synthesis syn_keep = 1*/
`define SYN_KEEP /*synthesis syn_keep = 1*/
`endif
`endif
 
 
 
`ifdef ACTEL
 
    // ACTEL FPGA should not use logic to handle rw collision
 
    `define SYN_NO_RW_CHECK /*synthesis syn_ramstyle = "no_rw_check"*/
 
`else
 
    `define SYN_NO_RW_CHECK
 
`endif
 
 
`ifdef ALL
`ifdef ALL
 
 
`define GBUF
`define GBUF
`define SYNC_RST
`define SYNC_RST
`define PLL
`define PLL
Line 94... Line 101...
`ifndef GBUF
`ifndef GBUF
`define GBUF
`define GBUF
`endif
`endif
`endif
`endif
 
 
`ifdef CDC
 
`ifndef PULSE2TOGGLE
 
`define PULSE2TOGGLE
 
`endif
 
`ifndef TOGGLE2PULSE
 
`define TOGGLE2PULSE
 
`endif
 
`ifndef SYNCHRONIZER
 
`define SYNCHRONIZER
 
`endif
 
`endif
 
 
 
`ifdef WB_B3_DPRAM
`ifdef WB_B3_DPRAM
`ifndef WB_ADR_INC
`ifndef WB_ADR_INC
`define WB_ADR_INC
`define WB_ADR_INC
`endif
`endif
`ifndef DPRAM_BE_2R2W
`ifndef DPRAM_BE_2R2W
Line 167... Line 162...
 `define WB_ADR_INC
 `define WB_ADR_INC
 `endif
 `endif
 `ifndef dpram_be_2r2w
 `ifndef dpram_be_2r2w
 `define DPRAM_BE_2R2W
 `define DPRAM_BE_2R2W
 `endif
 `endif
 
 `ifndef CDC
 
 `define CDC
 
 `endif
 `endif
 `endif
 
 
`ifdef MULTS18X18
`ifdef MULTS18X18
`ifndef MULTS
`ifndef MULTS
`define MULTS
`define MULTS
Line 280... Line 278...
`ifndef DPRAM_1R1W
`ifndef DPRAM_1R1W
`define DPRAM_1R1W
`define DPRAM_1R1W
`endif
`endif
`endif
`endif
 
 
 
`ifdef CDC
 
`ifndef PULSE2TOGGLE
 
`define PULSE2TOGGLE
 
`endif
 
`ifndef TOGGLE2PULSE
 
`define TOGGLE2PULSE
 
`endif
 
`ifndef SYNCHRONIZER
 
`define SYNCHRONIZER
 
`endif
 
`endif
 
 
// size to width
// size to width
`define SIZE2WIDTH_EXPR = (`SIZE2WIDTH==4) ? 2 : (`SIZE2WIDTH==8) ? 3 : (`SIZE2WIDTH==16) ? 4 : (`SIZE2WIDTH==32) ? 5 : (`SIZE2WIDTH==64) ? 6 : (`SIZE2WIDTH==128) ? 7 : 8;
`define SIZE2WIDTH_EXPR = (`SIZE2WIDTH==4) ? 2 : (`SIZE2WIDTH==8) ? 3 : (`SIZE2WIDTH==16) ? 4 : (`SIZE2WIDTH==32) ? 5 : (`SIZE2WIDTH==64) ? 6 : (`SIZE2WIDTH==128) ? 7 : 8;
 
 
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