| Line 214... |
Line 214... |
input [(addr_width-1):0] adr_a;
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input [(addr_width-1):0] adr_a;
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input [(addr_width-1):0] adr_b;
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input [(addr_width-1):0] adr_b;
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input we_a;
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input we_a;
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output reg [(data_width-1):0] q_b;
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output reg [(data_width-1):0] q_b;
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input clk_a, clk_b;
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input clk_a, clk_b;
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reg [data_width-1:0] ram [mem_size-1:0] `SYN_NO_RW_CHECK;
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reg [data_width-1:0] ram [0:mem_size-1] `SYN_NO_RW_CHECK;
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parameter memory_init = 0;
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parameter memory_init = 0;
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parameter memory_file = "vl_ram.vmem";
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parameter memory_file = "vl_ram.vmem";
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parameter debug = 0;
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parameter debug = 0;
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| Line 267... |
Line 267... |
input we_a;
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input we_a;
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output [(data_width-1):0] q_b;
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output [(data_width-1):0] q_b;
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output reg [(data_width-1):0] q_a;
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output reg [(data_width-1):0] q_a;
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input clk_a, clk_b;
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input clk_a, clk_b;
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reg [(data_width-1):0] q_b;
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reg [(data_width-1):0] q_b;
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reg [data_width-1:0] ram [mem_size-1:0] `SYN_NO_RW_CHECK;
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reg [data_width-1:0] ram [0:mem_size-1] `SYN_NO_RW_CHECK;
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parameter memory_init = 0;
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parameter memory_init = 0;
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parameter memory_file = "vl_ram.vmem";
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parameter memory_file = "vl_ram.vmem";
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parameter debug = 0;
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parameter debug = 0;
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| Line 322... |
Line 322... |
input [(data_width-1):0] d_b;
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input [(data_width-1):0] d_b;
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output reg [(data_width-1):0] q_a;
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output reg [(data_width-1):0] q_a;
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input we_b;
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input we_b;
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input clk_a, clk_b;
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input clk_a, clk_b;
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reg [(data_width-1):0] q_b;
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reg [(data_width-1):0] q_b;
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reg [data_width-1:0] ram [mem_size-1:0] `SYN_NO_RW_CHECK;
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reg [data_width-1:0] ram [0:mem_size-1] `SYN_NO_RW_CHECK;
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parameter memory_init = 0;
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parameter memory_init = 0;
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parameter memory_file = "vl_ram.vmem";
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parameter memory_file = "vl_ram.vmem";
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parameter debug = 0;
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parameter debug = 0;
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| Line 383... |
Line 383... |
input [(data_width-1):0] d_b;
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input [(data_width-1):0] d_b;
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output reg [(data_width-1):0] q_a;
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output reg [(data_width-1):0] q_a;
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input we_b;
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input we_b;
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input clk_a, clk_b;
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input clk_a, clk_b;
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reg [(data_width-1):0] q_b;
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reg [(data_width-1):0] q_b;
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reg [data_width-1:0] ram [mem_size-1:0] `SYN_NO_RW_CHECK;
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reg [data_width-1:0] ram [0:mem_size-1] `SYN_NO_RW_CHECK;
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parameter memory_init = 0;
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parameter memory_init = 0;
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parameter memory_file = "vl_ram.vmem";
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parameter memory_file = "vl_ram.vmem";
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parameter debug = 0;
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parameter debug = 0;
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