OpenCores
URL https://opencores.org/ocsvn/versatile_library/versatile_library/trunk

Subversion Repositories versatile_library

[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [registers.v] - Diff between revs 40 and 41

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 40 Rev 41
Line 457... Line 457...
endmodule
endmodule
`endif
`endif
 
 
`ifdef DELAY_EMPTYFLAG
`ifdef DELAY_EMPTYFLAG
`define MODULE delay_emptyflag
`define MODULE delay_emptyflag
module vl_delay_emptyflag ( d, q, emptyflag, clk, rst);
module `BASE`MODULE ( d, q, emptyflag, clk, rst);
`undef MODULE
`undef MODULE
parameter depth = 10;
parameter depth = 10;
input d;
input d;
output q, emptyflag;
output q, emptyflag;
input clk, rst;
input clk, rst;

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.