OpenCores
URL https://opencores.org/ocsvn/versatile_library/versatile_library/trunk

Subversion Repositories versatile_library

[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [versatile_library.v] - Diff between revs 14 and 15

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 14 Rev 15
Line 527... Line 527...
     if (direction_clr)
     if (direction_clr)
       direction <= going_empty;
       direction <= going_empty;
     else
     else
       direction <= going_full;*/
       direction <= going_full;*/
endmodule
endmodule
`endif//////////////////////////////////////////////////////////////////////
`endif
 
 
 
module delay ( d, q, clk, rst);
 
parameter depth = 10;
 
input d;
 
output q;
 
input clk, rst;
 
 
 
reg [1:depth] dffs;
 
 
 
always @ (posedge clk or posedge rst)
 
if (rst)
 
    dffs <= {depth{1'b0}};
 
else
 
    dffs <= {d,dffs[1:depth-1]};
 
assign q = dffs[depth];
 
endmodule//////////////////////////////////////////////////////////////////////
////                                                              ////
////                                                              ////
////  Versatile counter                                           ////
////  Versatile counter                                           ////
////                                                              ////
////                                                              ////
////  Description                                                 ////
////  Description                                                 ////
////  Versatile counter, a reconfigurable binary, gray or LFSR    ////
////  Versatile counter, a reconfigurable binary, gray or LFSR    ////

powered by: WebSVN 2.1.0

© copyright 1999-2019 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.