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URL https://opencores.org/ocsvn/versatile_library/versatile_library/trunk

Subversion Repositories versatile_library

[/] [versatile_library/] [trunk/] [sim/] [rtl_sim/] [run/] [Makefile] - Diff between revs 87 and 88

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Rev 87 Rev 88
Line 1... Line 1...
wb_dpram_be:
VERILOG_FILES = ./../../../rtl/verilog/versatile_library.v
        vppreproc --noline --noblank +define+SYSTEMVERILOG +define+WB_DPRAM_BE ../../../rt/verilog/versatile_library.v > wb_dp_ram_be.v
 
 
wb_b3_ram_be.v:
 
        vppreproc --noline --noblank +define+SYSTEMVERILOG +define+WB_B3_RAM_BE $(VERILOG_FILES) > wb_b3_ram_be.v

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