| Line 3... |
Line 3... |
---- VHDL Wishbone TESTBENCH ----
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---- VHDL Wishbone TESTBENCH ----
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---- ----
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---- ----
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---- This file is part of the vhdl_wb_tb project ----
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---- This file is part of the vhdl_wb_tb project ----
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---- http://www.opencores.org/cores/vhdl_wb_tb/ ----
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---- http://www.opencores.org/cores/vhdl_wb_tb/ ----
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---- ----
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---- ----
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---- This file contains the highest (top) module of the test ----
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---- This file contains the one test sequence for the test bench.----
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---- bench. ----
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---- Several test sequences shall be stored in several tc_xxxx ----
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---- It instantiates the design under test (DUT), instantiates ----
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---- files. This file contains the architecture for the tc_top ----
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---- the stimulator module for test vector generation, ----
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---- enity, lcated in tc_top.vhd. ----
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---- instantiates the verifier module for result comparison, ----
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---- instantiates the test case top (testcase_top) bfm, ----
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---- interconnects all three components, generates DUT-external ----
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---- clocks and resets. ----
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---- ----
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---- ----
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---- To Do: ----
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---- To Do: ----
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---- - ----
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---- - ----
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---- ----
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---- ----
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---- Author(s): ----
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---- Author(s): ----
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---- - Sinx, email@opencores.org ----
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---- - Sinx, sinx@opencores.org ----
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---- ----
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---- ----
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----------------------------------------------------------------------
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----------------------------------------------------------------------
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-- SVN information
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---- SVN information
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--
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----
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-- $URL: $
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---- $URL: $
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-- $Revision: $
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---- $Revision: $
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-- $Date: $
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---- $Date: $
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-- $Author: $
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---- $Author: $
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-- $Id: $
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---- $Id: $
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--
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----------------------------------------------------------------------
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----------------------------------------------------------------------
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---- ----
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---- ----
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---- Copyright (C) 2018 Authors and OPENCORES.ORG ----
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---- Copyright (C) 2018 Authors and OPENCORES.ORG ----
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---- ----
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---- ----
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---- This source file may be used and distributed without ----
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---- This source file may be used and distributed without ----
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| Line 66... |
Line 61... |
use work.wishbone_bfm_pkg.all;
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use work.wishbone_bfm_pkg.all;
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use work.my_project_pkg.all;
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use work.my_project_pkg.all;
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use work.tb_pkg.all;
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use work.tb_pkg.all;
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|
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-- architecture ------------------------------------------------------
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-- architecture ------------------------------------------------------
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architecture tc_xxxx of testcase_top is
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architecture tc_xxxx of tc_top is
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--==========================================================================
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----------------------------------------------------------------------
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-- local constant definitions
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-- local constant definitions
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--==========================================================================
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----------------------------------------------------------------------
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--==========================================================================
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begin
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begin
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--==========================================================================
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----------------------------------------------------------------------
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tc_xxxx_proc : process
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tc_xxxx_proc : process
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begin
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begin
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--==========================================================================
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----------------------------------------------------------------------
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-- standard signal initialization
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-- standard signal initialization
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wb_o <= wb_bfm_master_out_idle_c;
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wb_o <= wb_bfm_master_out_idle_c;
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|
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wait until wb_i.rst = '0';
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wait until wb_i.rst = '0';
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wait until rising_edge(wb_i.clk);
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wait until rising_edge(wb_i.clk);
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wait until rising_edge(wb_i.clk);
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wait until rising_edge(wb_i.clk);
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--
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--
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wait for 400 ns;
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wait for 400 ns;
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wait until rising_edge(wb_i.clk);
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wait until rising_edge(wb_i.clk);
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--
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--
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--==========================================================================
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----------------------------------------------------------------------
|
|
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report "-----------------------------------------------------------------";
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report "-----------------------------------------------------------------";
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report "-- tc_xxxx: ADD_DESCRIPTION_HERE --";
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report "-- tc_xxxx: ADD_DESCRIPTION_HERE --";
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report "-----------------------------------------------------------------";
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report "-----------------------------------------------------------------";
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--
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--
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| Line 138... |
Line 132... |
report "-----------------------------------------------------------------";
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report "-----------------------------------------------------------------";
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wait for 6 us;
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wait for 6 us;
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wait until rising_edge(wb_i.clk);
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wait until rising_edge(wb_i.clk);
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wb_read (verifier_register2_c, 16#0000_0005#, wb_i, wb_o);
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wb_read (verifier_register2_c, 16#0000_0005#, wb_i, wb_o);
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wait for 1 us;
|
wait for 1 us;
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-- =================================================
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----------------------------------------------------------------------
|
report "-- tc_xxxx finished";
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report "-- tc_xxxx finished";
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-- =================================================
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----------------------------------------------------------------------
|
--
|
|
wait for 400 ns;
|
|
--wait;
|
|
--
|
--
|
report "test case tc_xxxx completed successfully"; --severity failure;
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report "test case tc_xxxx completed successfully"; --severity failure;
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report "-----------------------------------------------------------------";
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report "-----------------------------------------------------------------";
|
report "-----------------------------------------------------------------";
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report "-----------------------------------------------------------------";
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std.env.stop; -- pause simulation
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wait for 100 ns;
|
|
|
--std.env.finish; -- stop simulation; end modelsim
|
if (exit_simulator_at_tc_end_c/="1") then
|
|
std.env.stop; -- pause simulation
|
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else
|
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std.env.finish; -- stop simulation
|
|
end if;
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end process tc_xxxx_proc;
|
end process tc_xxxx_proc;
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--==========================================================================
|
----------------------------------------------------------------------
|
end tc_xxxx;
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end tc_xxxx;
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--============================================================================
|
|
-- end of file
|
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--============================================================================
|
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No newline at end of file
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No newline at end of file
|
|
----------------------------------------------------------------------
|
|
---- end of file ----
|
|
----------------------------------------------------------------------
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No newline at end of file
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No newline at end of file
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