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[/] [zap/] [trunk/] [src/] [rtl/] [cpu/] [zap_predecode_mem_fsm.v] - Diff between revs 43 and 51

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Rev 43 Rev 51
Line 226... Line 226...
                begin
                begin
                        // BLX1 detected. Unconditional!!!
                        // BLX1 detected. Unconditional!!!
                        // Immediate Offset.
                        // Immediate Offset.
                        if ( i_instruction[31:25] == BLX1[31:25] && i_instruction_valid )
                        if ( i_instruction[31:25] == BLX1[31:25] && i_instruction_valid )
                        begin
                        begin
                                $display($time, "%m: BLX1 detected!");
 
 
 
                                // We must generate a SUBAL LR,PC,4 ROR 0
                                // We must generate a SUBAL LR,PC,4 ROR 0
                                // This makes LR have the value
                                // This makes LR have the value
                                // PC+8-4=PC+4 which is the address of
                                // PC+8-4=PC+4 which is the address of
                                // the next instruction.
                                // the next instruction.
                                o_instruction           = {AL, 2'b00, 1'b1, SUB, 1'd0, 4'd14, 4'd15, 12'd4};
                                o_instruction           = {AL, 2'b00, 1'b1, SUB, 1'd0, 4'd14, 4'd15, 12'd4};
Line 245... Line 243...
                                o_stall_from_decode     = 1'd1; // Stall the core.
                                o_stall_from_decode     = 1'd1; // Stall the core.
                                state_nxt               = BLX1_ARM_S0;
                                state_nxt               = BLX1_ARM_S0;
                        end
                        end
                        else if ( i_instruction[27:4] == BLX2[27:4] && i_instruction_valid ) // BLX2 detected. Register offset. CONDITIONAL.
                        else if ( i_instruction[27:4] == BLX2[27:4] && i_instruction_valid ) // BLX2 detected. Register offset. CONDITIONAL.
                        begin
                        begin
                                $display($time, "%m: BLX2 detected!");
 
 
 
                                // Write address of next instruction to LR. Now this
                                // Write address of next instruction to LR. Now this
                                // depends on the mode we're in. Mode in the sense
                                // depends on the mode we're in. Mode in the sense
                                // ARM/Thumb. We need to look at i_cpsr_t.
                                // ARM/Thumb. We need to look at i_cpsr_t.
 
 
                                // We need to generate a SUBcc LR,PC,4 ROR 0
                                // We need to generate a SUBcc LR,PC,4 ROR 0
Line 271... Line 267...
                        // LDM/STM detected...
                        // LDM/STM detected...
                        else if ( id == 3'b100 && i_instruction_valid )
                        else if ( id == 3'b100 && i_instruction_valid )
                        begin
                        begin
                                // Backup base register.
                                // Backup base register.
                                // MOV DUMMY0, Base
                                // MOV DUMMY0, Base
`ifdef LDM_DEBUG
 
                                $display($time, "%m: Load/Store Multiple detected!");
 
`endif
 
 
 
                                if ( up )
                                if ( up )
                                begin
                                begin
                                        o_instruction = {cc, 2'b00, 1'b0, MOV,
                                        o_instruction = {cc, 2'b00, 1'b0, MOV,
                                                 1'b0, 4'd0, 4'd0, 8'd0, base};
                                                 1'b0, 4'd0, 4'd0, 8'd0, base};
 
 
Line 312... Line 304...
                        else if ( i_instruction[27:23] == 5'b00010 &&
                        else if ( i_instruction[27:23] == 5'b00010 &&
                                  i_instruction[21:20] == 2'b00 &&
                                  i_instruction[21:20] == 2'b00 &&
                                  i_instruction[11:4] == 4'b1001 && i_instruction_valid ) // SWAP
                                  i_instruction[11:4] == 4'b1001 && i_instruction_valid ) // SWAP
                        begin
                        begin
                                // Swap 
                                // Swap 
`ifdef LDM_DEBUG
 
                                $display($time, "%m: Detected SWAP instruction!");
 
`endif
 
 
 
                                o_irq = i_irq;
                                o_irq = i_irq;
                                o_fiq = i_fiq;
                                o_fiq = i_fiq;
 
 
                                // dummy = *(rn) - LDR ARCH_DUMMY_REG0, [rn, #0]
                                // dummy = *(rn) - LDR ARCH_DUMMY_REG0, [rn, #0]

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