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[/] [zap/] [trunk/] [src/] [rtl/] [cpu/] [zap_wb_merger.v] - Diff between revs 26 and 51

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Rev 26 Rev 51
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`default_nettype none
`default_nettype none
 
 
module zap_wb_merger (
module zap_wb_merger (
 
 
 
// Clock and reset       
input wire i_clk,
input wire i_clk,
input wire i_reset,
input wire i_reset,
 
 
// Wishbone bus 1
// Wishbone bus 1
input wire i_c_wb_stb,
input wire i_c_wb_stb,
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                o_wb_cti <= i_d_wb_cti;
                o_wb_cti <= i_d_wb_cti;
        end
        end
end
end
 
 
endmodule
endmodule
 
 
`default_nettype wire
`default_nettype wire
 
 
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// ----------------------------------------------------------------------------
 
// EOF
 
// ----------------------------------------------------------------------------
 
 
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