OpenCores
URL https://opencores.org/ocsvn/zap/zap/trunk

Subversion Repositories zap

[/] [zap/] [trunk/] [src/] [ts/] [factorial/] [factorial.s] - Diff between revs 30 and 38

Go to most recent revision | Show entire file | Details | Blame | View Log

Rev 30 Rev 38
Line 188... Line 188...
ldr r0, =#0xFFFFFFA0    // VIC base address.
ldr r0, =#0xFFFFFFA0    // VIC base address.
add r0, r0, #4          // Move to INT_MASK
add r0, r0, #4          // Move to INT_MASK
ldr r1, =#0x0           // Prepare mask value
ldr r1, =#0x0           // Prepare mask value
str r1, [r0]            // Unmask all interrupt sources.
str r1, [r0]            // Unmask all interrupt sources.
 
 
// Program timer peripheral to tick every 255 clock cycles.
// Program timer peripheral to tick every 32 clock cycles.
ldr r0 ,=#0xFFFFFFC0    // Timer base address.
ldr r0 ,=#0xFFFFFFC0    // Timer base address.
ldr r1 ,=#1
ldr r1 ,=#1
str r1, [r0]            // Enable timer
str r1, [r0]            // Enable timer
add r0, r0, #4
add r0, r0, #4
ldr r1, =#255
ldr r1, =#32
str r1, [r0]            // Program to 255 clocks.
str r1, [r0]            // Program to 255 clocks.
add r0, r0, #8
add r0, r0, #8
ldr r1, =#0x1
ldr r1, =#0x1
str r1, [r0]            // Start the timer.
str r1, [r0]            // Start the timer.
 
 

powered by: WebSVN 2.1.0

© copyright 1999-2022 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.