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[/] [zipcpu/] [trunk/] [rtl/] [peripherals/] [flashcache.v] - Diff between revs 2 and 69

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Rev 2 Rev 69
Line 8... Line 8...
//              nearly 24 clock cycles per read, this 'cache' module
//              nearly 24 clock cycles per read, this 'cache' module
//              is offered to minimize the effect.  The CPU may now request
//              is offered to minimize the effect.  The CPU may now request
//              some amount of flash to be copied into this on-chip RAM,
//              some amount of flash to be copied into this on-chip RAM,
//              and then access it with nearly zero latency.
//              and then access it with nearly zero latency.
//
//
 
// Status:      This file is no longer being used as an active file within
 
//              the ZipCPU project.  It's an older file from an idea that 
 
//      never really caught traction.
 
//
// Interface:
// Interface:
//      FlashCache sits on the Wishbone bus as both a slave and a master.
//      FlashCache sits on the Wishbone bus as both a slave and a master.
//      Slave requests for memory will get mapped to a local RAM, from which
//      Slave requests for memory will get mapped to a local RAM, from which
//      reads and writes may take place.
//      reads and writes may take place.
//
//
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//              the value if read address is less than the current copy
//              the value if read address is less than the current copy
//              address, or else they will stall until the read address is
//              address, or else they will stall until the read address is
//              less than the copy address.
//              less than the copy address.
//
//
// Creator:     Dan Gisselquist, Ph.D.
// Creator:     Dan Gisselquist, Ph.D.
//              Gisselquist Tecnology, LLC
//              Gisselquist Technology, LLC
//
//
///////////////////////////////////////////////////////////////////////////
///////////////////////////////////////////////////////////////////////////
//
//
// Copyright (C) 2015, Gisselquist Technology, LLC
// Copyright (C) 2015, Gisselquist Technology, LLC
//
//

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