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[/] [zipcpu/] [trunk/] [sw/] [zasm/] [sys.i] - Diff between revs 34 and 36

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;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;
;
; Filename:     sys.i
; Filename:     sys.i
;
;
; Project:      Zip CPU -- a small, lightweight, RISC CPU soft core
; Project:      Zip CPU -- a small, lightweight, RISC CPU soft core
;
;
; Purpose:      This is the beginnings of a system wide header file for the
; Purpose:      This is the beginnings of a system wide header file for the
;               Zip System.   It describes and declares the peripherals
;               Zip System.   It describes and declares the peripherals
;               that will the be used and referenced by the assembly files.
;               that will the be used and referenced by the assembly files.
;
;
; Status:       As of August, 2015, I have no confidence that the preprocessor
; Status:       As of August, 2015, I have no confidence that the preprocessor
;               can properly include this file.  It certainly cannot handle
;               can properly include this file.  It certainly cannot handle
;               macros (yet).
;               macros (yet).
;
;
; Creator:      Dan Gisselquist, Ph.D.
; Creator:      Dan Gisselquist, Ph.D.
;               Gisselquist Tecnology, LLC
;               Gisselquist Tecnology, LLC
;
;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;
;
; Copyright (C) 2015, Gisselquist Technology, LLC
; Copyright (C) 2015, Gisselquist Technology, LLC
;
;
; This program is free software (firmware): you can redistribute it and/or
; This program is free software (firmware): you can redistribute it and/or
; modify it under the terms of  the GNU General Public License as published
; modify it under the terms of  the GNU General Public License as published
; by the Free Software Foundation, either version 3 of the License, or (at
; by the Free Software Foundation, either version 3 of the License, or (at
; your option) any later version.
; your option) any later version.
;
;
; This program is distributed in the hope that it will be useful, but WITHOUT
; This program is distributed in the hope that it will be useful, but WITHOUT
; ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
; ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
; for more details.
; for more details.
;
;
; License:      GPL, v3, as defined and found on www.gnu.org,
; License:      GPL, v3, as defined and found on www.gnu.org,
;               http://www.gnu.org/licenses/gpl.html
;               http://www.gnu.org/licenses/gpl.html
;
;
;
;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;
;
        sys.bus         equ     0xc0000000
        sys.bus         equ     0xc0000000
        sys.breaken     equ     0x080
        sys.breaken     equ     0x080
        sys.step        equ     0x040
        sys.step        equ     0x040
        sys.gie         equ     0x020
        sys.gie         equ     0x020
        sys.sleep       equ     0x010
        sys.sleep       equ     0x010
        sys.ccv         equ     0x008
        sys.ccv         equ     0x008
        sys.ccn         equ     0x004
        sys.ccn         equ     0x004
        sys.ccc         equ     0x002
        sys.ccc         equ     0x002
        sys.ccz         equ     0x001
        sys.ccz         equ     0x001
        sys.bu.pic      equ     0x000
        sys.bus.pic     equ     0x000
        sys.bus.wdt     equ     0x001
        sys.bus.wdt     equ     0x001
        sys.bus.cache   equ     0x002
        sys.bus.cache   equ     0x002
        sys.bus.ctrpic  equ     0x003
        sys.bus.ctrpic  equ     0x003
        sys.bus.tma     equ     0x004
        sys.bus.tma     equ     0x004
; Define the location(s) of our peripherals,
; Define the location(s) of our peripherals,
#define sys.base        0xc0000000
#define sys.base        0xc0000000
#define sys.cache.base  0xc0100000
#define sys.cache.base  0xc0100000
#struct sys
#struct sys
        pic
        pic
        wdt
        wdt
        cache
        cache
        ctrpic
        ctrpic
        tma
        tma
        tmb
        tmb
        tmc
        tmc
        jiffies
        jiffies
        mtask
        mtask
        mstl
        mstl
        mpstl
        mpstl
        mastl
        mastl
        utask
        utask
        ustl
        ustl
        upstl
        upstl
        uastl
        uastl
#endstruct
#endstruct
; and their associated interrupt vectors ...
; and their associated interrupt vectors ...
#define CACHEINT        0x01
#define CACHEINT        0x01
#define JIFFYINT        0x02    ;
#define JIFFYINT        0x02    ;
#define TMCINT          0x04    ;
#define TMCINT          0x04    ;
#define TMBINT          0x08    ;
#define TMBINT          0x08    ;
#define TMAINT          0x10    ;
#define TMAINT          0x10    ;
#define CTRPICINT       0x20    ; The aux interrupt controller
#define CTRPICINT       0x20    ; The aux interrupt controller
; Masks to send to enable those same vectors
; Masks to send to enable those same vectors
#define CACHEINTEN      0x80010000
#define CACHEINTEN      0x80010000
#define JIFFYINTEN      0x80020000
#define JIFFYINTEN      0x80020000
#define TMCINTEN        0x80040000
#define TMCINTEN        0x80040000
#define TMBINTEN        0x80080000
#define TMBINTEN        0x80080000
#define TMAINTEN        0x80100000
#define TMAINTEN        0x80100000
#define CTRPICEN        0x80200000
#define CTRPICEN        0x80200000
; And similar masks to disable them
; And similar masks to disable them
#define CACHEINTDIS     0x00010000
#define CACHEINTDIS     0x00010000
#define JIFFYINTDIS     0x00020000
#define JIFFYINTDIS     0x00020000
#define TMCINTDIS       0x00040000
#define TMCINTDIS       0x00040000
#define TMBINTDIS       0x00080000
#define TMBINTDIS       0x00080000
#define TMAINTDIS       0x00100000
#define TMAINTDIS       0x00100000
#define CTRPICDIS       0x00200000
#define CTRPICDIS       0x00200000
; Define our condition code bits
; Define our condition code bits
#define CCZ     0x001
#define CCZ     0x001
#define CCC     0x002
#define CCC     0x002
#define CCN     0x004
#define CCN     0x004
#define CCV     0x008
#define CCV     0x008
#define CCSLEEP 0x010
#define CCSLEEP 0x010
#define CCGIE   0x020
#define CCGIE   0x020
#define CCSTEP  0x040
#define CCSTEP  0x040
#define CCUBRK  0x080
#define CCUBRK  0x080
; Now, some macros
; Now, some macros
#define PUSH(RG,SP)     SUB 1,SP                \
#define PUSH(RG,SP)     SUB 1,SP                \
                        STO RG,1(SP)
                        STO RG,1(SP)
#define POP(RG,SP)      LOD 1(SP),RG            \
#define POP(RG,SP)      LOD 1(SP),RG            \
                        ADD 1,SP
                        ADD 1,SP
#define FJSR(LBL,RG)    MOV __here__+2(PC),RG   \
#define FJSR(LBL,RG)    MOV __here__+2(PC),RG   \
                        JMP LBL
                        JMP LBL
#define FRET(RG)        MOV RG,PC
#define FRET(RG)        MOV RG,PC
#define JSR(LBL,RG)     SUB 1,SP                \
#define JSR(LBL,RG)     SUB 1,SP                \
                        MOV __here__+3(PC),RG   \
                        MOV __here__+3(PC),RG   \
                        STO RG,1(SP)            \
                        STO RG,1(SP)            \
                        JMP LBL                 \
                        JMP LBL                 \
                        ADD 1,SP
                        ADD 1,SP
#define RET             LOD 1(SP),PC
#define RET             LOD 1(SP),PC
#define SAVE_USER_CONTEXT(DR,AR)                \
#define SAVE_USER_CONTEXT(DR,AR)                \
                        MOV -16(uSP),AR         \
                        MOV -15(uSP),AR         \
                        MOV     uPC,DR          \
                        MOV     uPC,DR          \
                        STO     DR,16(AR)       \
 
                        MOV     uCC,DR          \
 
                        STO     DR,15(AR)       \
                        STO     DR,15(AR)       \
                        MOV     uSP,DR          \
                        MOV     uCC,DR          \
                        STO     DR,14(AR)       \
                        STO     DR,14(AR)       \
                        MOV     uR12,DR         \
                        MOV     uR12,DR         \
                        STO     DR,13(AR)       \
                        STO     DR,13(AR)       \
                        MOV     uR11,DR         \
                        MOV     uR11,DR         \
                        STO     DR,12(AR)       \
                        STO     DR,12(AR)       \
                        MOV     uR10,DR         \
                        MOV     uR10,DR         \
                        STO     DR,11(AR)       \
                        STO     DR,11(AR)       \
                        MOV     uR9,DR          \
                        MOV     uR9,DR          \
                        STO     DR,10(AR)       \
                        STO     DR,10(AR)       \
                        MOV     uR8,DR          \
                        MOV     uR8,DR          \
                        STO     DR,9(AR)        \
                        STO     DR,9(AR)        \
                        MOV     uR7,DR          \
                        MOV     uR7,DR          \
                        STO     DR,8(AR)        \
                        STO     DR,8(AR)        \
                        MOV     uR6,DR          \
                        MOV     uR6,DR          \
                        STO     DR,7(AR)        \
                        STO     DR,7(AR)        \
                        MOV     uR5,DR          \
                        MOV     uR5,DR          \
                        STO     DR,6(AR)        \
                        STO     DR,6(AR)        \
                        MOV     uR4,DR          \
                        MOV     uR4,DR          \
                        STO     DR,5(AR)        \
                        STO     DR,5(AR)        \
                        MOV     uR3,DR          \
                        MOV     uR3,DR          \
                        STO     DR,4(AR)        \
                        STO     DR,4(AR)        \
                        MOV     uR2,DR          \
                        MOV     uR2,DR          \
                        STO     DR,3(AR)        \
                        STO     DR,3(AR)        \
                        MOV     uR1,DR          \
                        MOV     uR1,DR          \
                        STO     DR,2(AR)        \
                        STO     DR,2(AR)        \
                        MOV     uR0,DR          \
                        MOV     uR0,DR          \
                        STO     DR,1(AR)
                        STO     DR,1(AR)
#define RESTORE_USER_CONTEXT(DR,AR)             \
#define RESTORE_USER_CONTEXT(DR,AR)             \
                        LOD     1(AR),DR        \
                        LOD     1(AR),DR        \
                        MOV     DR,uR0          \
                        MOV     DR,uR0          \
                        LOD     2(AR),DR        \
                        LOD     2(AR),DR        \
                        MOV     DR,uR1          \
                        MOV     DR,uR1          \
                        LOD     3(AR),DR        \
                        LOD     3(AR),DR        \
                        MOV     DR,uR2          \
                        MOV     DR,uR2          \
                        LOD     4(AR),DR        \
                        LOD     4(AR),DR        \
                        MOV     DR,uR3          \
                        MOV     DR,uR3          \
                        LOD     5(AR),DR        \
                        LOD     5(AR),DR        \
                        MOV     DR,uR4          \
                        MOV     DR,uR4          \
                        LOD     6(AR),DR        \
                        LOD     6(AR),DR        \
                        MOV     DR,uR5          \
                        MOV     DR,uR5          \
                        LOD     7(AR),DR        \
                        LOD     7(AR),DR        \
                        MOV     DR,uR6          \
                        MOV     DR,uR6          \
                        LOD     8(AR),DR        \
                        LOD     8(AR),DR        \
                        MOV     DR,uR7          \
                        MOV     DR,uR7          \
                        LOD     9(AR),DR        \
                        LOD     9(AR),DR        \
                        MOV     DR,uR8          \
                        MOV     DR,uR8          \
                        LOD     10(AR),DR       \
                        LOD     10(AR),DR       \
                        MOV     DR,uR9          \
                        MOV     DR,uR9          \
                        LOD     11(AR),DR       \
                        LOD     11(AR),DR       \
                        MOV     DR,uR10         \
                        MOV     DR,uR10         \
                        LOD     12(AR),DR       \
                        LOD     12(AR),DR       \
                        MOV     DR,uR11         \
                        MOV     DR,uR11         \
                        LOD     13(AR),DR       \
                        LOD     13(AR),DR       \
                        MOV     DR,uR12         \
                        MOV     DR,uR12         \
                        LOD     14(AR),DR       \
                        LOD     14(AR),DR       \
                        MOV     DR,uSP          \
 
                        LOD     15(AR),DR       \
 
                        MOV     DR,uCC          \
                        MOV     DR,uCC          \
                        LOD     16(AR),DR       \
                        LOD     15(AR),DR       \
                        MOV     DR,uPC
                        MOV     DR,uPC
#define READ_USER_TRAP(RG)                      \
#define READ_USER_TRAP(RG)                      \
                        MOV     uCC,RG          \
                        MOV     uCC,RG          \
                        AND     -256,RG
                        AND     -256,RG
 
 

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