page1
MBIST Scan Chain
Boundary Scan Chain
Debug Scan Chain
TDI
TDO
TCK
TMS
TRSTn
Debug Interface
CPU
+
CPU Development Interface
CPU n
CPU
+
CPU Development Interface
CPU 1
MUX logic
MUX
TAP Controller
FSM
ID
MUX
CPU sub-module
WISHB. sub-module
Optional sub-modules
FSM
MUX
Reg.
CRC
FSM
MUX
Logic
Logic