Top entity of the display driver. More...
Inheritance diagram for display_driver_w_decoder:
Collaboration diagram for display_driver_w_decoder:
Entities | |
| display_driver_w_decoder_arch | architecture |
| Architecture definition of the display_driver_w_decoder. More... | |
Libraries | |
| ieee | |
Use Clauses | |
| std_logic_1164 | |
| numeric_std | |
Ports | |
| clk | in std_logic |
| input clock, xx MHz. | |
| reset | in std_logic |
| active high | |
| ascii_in | in std_logic_vector ( 7 downto 0 ) |
| input ASCII code to display | |
| wr_en | in std_logic |
| active high write enable to store the ASCII code in a register | |
| disp_data_q | out std_logic_vector ( 14 downto 0 ) |
Detailed Description
Top entity of the display driver.
Top entity of the decoder architecture. Module description also goes here.
Member Data Documentation
◆ disp_data_q
|
Port |
Typically the data fed to display (single or multiple) is provided for single display at a time. If multiple displays are required scan signal must be additionally provided (according typical dynamic display indication).
Display Segment Bit Mapping
| Bit Number | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Display Segment | dp | m | l | k | j | i | h | g2 | g1 | f | e | d | c | b | a |
Note that there is no standard way to name the segments. Current data bits correspondt to display segments according this picture:
The documentation for this class was generated from the following file:
- C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/display_driver_w_decoder.vhd
