URL
https://opencores.org/ocsvn/t48/t48/trunk
Subversion Repositories t48
[/] [t48/] [tags/] [rel_1_0/] [KNOWN_BUGS] - Rev 121
Go to most recent revision | Compare with Previous | Blame | View Log
Known bugs of the T48 uController core
======================================
Version: $Date: 2004-06-30 21:25:54 $
Release 0.2 BETA
----------------
*******************************************************************************
Program Memory bank can be switched during interrupt
During an interrupt service routine (i.e. after vectoring to location 3 or 7
of the Program Memory and befor executing the RETR instruction) the Program
Memory bank can be switched by executing a JMP or CALL instruction. These
instructions honour the current state of the Program Memory Bank Flag and thus
switch the Program Memory bank upon execution.
Fixed in:
int.vhd 1.2
decoder.vhd 1.14
Updated regression test:
black_box/mb/int
Fix will be included in next release.
Release 0.1 BETA
----------------
*******************************************************************************
Program Memory bank can be switched during interrupt
See above.
******************************************************************************
External Program Memory ignored when EA = 0
The external Program Memory is always ignored when EA = 0 with the t8048 system
toplevel. Desired behaviour is to access external Program Memory when code
has to be fetched from an address location that is outside the internal
Program Memory.
Fixed in t8048.vhd 1.3
Fix will be included in next release.
******************************************************************************
ANL and ORL to P2 read port status instead of port output register
The ANL and ORL instructions for P2 read the port status and apply the logical
operation on this value. Instead, they should read the port output register
and operate on this value.
Fixed in p2.vhd 1.5
Regression test:
white_box/p2_port_reg_conflict
Fix will be included in next release.
******************************************************************************
Counter is not incremented
When in counter mode, the timer/counter module does not increment upon a
falling edge of T1. Reason is a typo in the code for the edge detection signal
t1_inc_s - it will never become true.
Fixed in timer.vhd 1.3
Regression tests:
black_box/cnt/cnt
black_box/cnt/int
Fix will be included in next release.
Go to most recent revision | Compare with Previous | Blame | View Log