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openMSP430
Basic Clock Module (ASIC)
LFXT_CLK
DCO_CLK
Low Frequency
clock source
(LFXT)
ACLK
SMCLK
1
0
DIVAx
DIVSx
Divider
1/2/4/8
SELS
Divider
1/2/4/8
SCG1
DCO_ENABLE
DCO_WKUP
High Frequency
clock source
(DCO)
LFXT_ENABLE
LFXT_WKUP
WKUP
OSCOFF
Glitch free logic
Glitch free logic
SCG0
MCLK
1
0
DIVMx
Divider
1/2/4/8
SELMx[1]
CPUOFF