URL
https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk
Subversion Repositories openrisc_me
[/] [openrisc/] [trunk/] [gnu-src/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [m32r/] [ldub.cgs] - Rev 336
Go to most recent revision | Compare with Previous | Blame | View Log
# m32r testcase for ldub $dr,@$sr
# mach(): m32r m32rx
.include "testutils.inc"
start
.global ldub
ldub:
mvaddr_h_gr r4, data_loc
mvi_h_gr r5, 0
ldub r5, @r4
test_h_gr r5, 0x80 ; big endian processor
pass
data_loc:
.word 0x800000f0
Go to most recent revision | Compare with Previous | Blame | View Log