OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] [openrisc/] [trunk/] [or1ksim/] [testsuite/] [libsim.tests/] [int-edge.exp] - Rev 261

Go to most recent revision | Compare with Previous | Blame | View Log

# int-edge.exp. Test of the library edge triggered interrupt functions

# Copyright (C) 2010 Embecosm Limited

# Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>

# This file is part of OpenRISC 1000 Architectural Simulator.

# This program is free software; you can redistribute it and/or modify it
# under the terms of the GNU General Public License as published by the Free
# Software Foundation; either version 3 of the License, or (at your option)
# any later version.

# This program is distributed in the hope that it will be useful, but WITHOUT
# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
# FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
# more details.

# You should have received a copy of the GNU General Public License along
# with this program.  If not, see <http:#www.gnu.org/licenses/>.  */

# -----------------------------------------------------------------------------
# This code is commented throughout for use with Doxygen.
# -----------------------------------------------------------------------------


# Run the library edge triggered interrupts in a number of ways.

# Sequence of independent interrupts
run_libsim "int-edge simple 1"                    \
    [list "Initalization succeeded."              \
          "Starting interrupt handler"            \
          "Enabling interrupts."                  \
          "Triggering interrupt 2"                \
          "PICSR 0x00000004 -> 0x00000000"        \
          "Triggering interrupt 3"                \
          "PICSR 0x00000008 -> 0x00000000"        \
          "Test completed successfully."]         \
    "lib-inttest/lib-inttest-edge" "int-edge.cfg" \
    "int-logger/int-logger-edge" "1" "2" "3"

run_libsim "int-edge simple 2"                    \
    [list "Initalization succeeded."              \
          "Starting interrupt handler"            \
          "Enabling interrupts."                  \
          "Triggering interrupt 7"                \
          "PICSR 0x00000080 -> 0x00000000"        \
          "Triggering interrupt 17"               \
          "PICSR 0x00020000 -> 0x00000000"        \
          "Triggering interrupt 31"               \
          "PICSR 0x80000000 -> 0x00000000"        \
          "Test completed successfully."]         \
    "lib-inttest/lib-inttest-edge" "int-edge.cfg" \
    "int-logger/int-logger-edge" "1" "7" "17" "31"

# Duplicated interrupts
run_libsim "int-edge duplicated 1"                \
    [list "Initalization succeeded."              \
          "Starting interrupt handler"            \
          "Enabling interrupts."                  \
          "Triggering interrupt 2"                \
          "PICSR 0x00000004 -> 0x00000000"        \
          "Triggering interrupt 4"                \
          "PICSR 0x00000010 -> 0x00000000"        \
          "Triggering interrupt 2"                \
          "PICSR 0x00000004 -> 0x00000000"        \
          "Test completed successfully."]         \
    "lib-inttest/lib-inttest-edge" "int-edge.cfg" \
    "int-logger/int-logger-edge" "1" "2" "4" "2"

run_libsim "int-edge duplicated 2"                \
    [list "Initalization succeeded."              \
          "Starting interrupt handler"            \
          "Enabling interrupts."                  \
          "Triggering interrupt 2"                \
          "PICSR 0x00000004 -> 0x00000000"        \
          "Triggering interrupt 2"                \
          "PICSR 0x00000004 -> 0x00000000"        \
          "Triggering interrupt 2"                \
          "PICSR 0x00000004 -> 0x00000000"        \
          "Triggering interrupt 2"                \
          "PICSR 0x00000004 -> 0x00000000"        \
          "Triggering interrupt 2"                \
          "PICSR 0x00000004 -> 0x00000000"        \
          "Triggering interrupt 2"                \
          "PICSR 0x00000004 -> 0x00000000"        \
          "Triggering interrupt 2"                \
          "PICSR 0x00000004 -> 0x00000000"        \
          "Triggering interrupt 2"                \
          "PICSR 0x00000004 -> 0x00000000"        \
          "Test completed successfully."]         \
    "lib-inttest/lib-inttest-edge" "int-edge.cfg" \
    "int-logger/int-logger-edge" "1" "2" "2" "2" "2" "2" "2" "2" "2"

# All from upcalls
run_libsim "int-edge all upcall"                  \
    [list "Initalization succeeded."              \
          "Starting interrupt handler"            \
          "Enabling interrupts."                  \
          "Triggering interrupt 7"                \
          "PICSR 0x00000080 -> 0x00000000"        \
          "Triggering interrupt 17"               \
          "PICSR 0x00020000 -> 0x00000000"        \
          "Triggering interrupt 31"               \
          "PICSR 0x80000000 -> 0x00000000"        \
          "Test completed successfully."]         \
    "lib-inttest/lib-inttest-edge" "int-edge.cfg" \
    "int-logger/int-logger-edge" "20" "7" "17" "31"

# Check the boundaries of acceptable interrupt numbers
run_libsim "int-edge check boundaries"                \
    [list "Initalization succeeded."                  \
          "Starting interrupt handler"                \
          "Enabling interrupts."                      \
          "Triggering interrupt 0"                    \
          "PICSR 0x00000001 -> 0x00000000"            \
          "Triggering interrupt 1"                    \
          "PICSR 0x00000002 -> 0x00000000"            \
          "Triggering interrupt 31"                   \
          "PICSR 0x80000000 -> 0x00000000"            \
          "Warning: Invalid interrupt # 32 - ignored" \
          "Triggering interrupt 31"                   \
          "PICSR 0x80000000 -> 0x00000000"            \
          "Triggering interrupt 1"                    \
          "PICSR 0x00000002 -> 0x00000000"            \
          "Triggering interrupt 0"                    \
          "PICSR 0x00000001 -> 0x00000000"            \
          "Test completed successfully."]             \
    "lib-inttest/lib-inttest-edge" "int-edge.cfg"     \
    "int-logger/int-logger-edge" "10" "0" "1" "31" "32" "31" "1" "0"

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.