Subversion Repositories openrisc_2011-10-31

/* mmu.cfg -- Or1ksim configuration script file for MMU test

   Copyright (C) 2001, Marko Mlinar <markom@opencores.org>
   Copyright (C) 2010 Embecosm Limited

   Contributor Marko Mlinar <markom@opencores.org>
   Contributor Jeremy Bennett <jeremy.bennett@embecosm.com>

   This file is part of OpenRISC 1000 Architectural Simulator.

   This program is free software; you can redistribute it and/or modify it
   under the terms of the GNU General Public License as published by the Free
   Software Foundation; either version 3 of the License, or (at your option)
   any later version.

   This program is distributed in the hope that it will be useful, but WITHOUT
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
   more details.

   You should have received a copy of the GNU General Public License along
   with this program.  If not, see <http:  www.gnu.org/licenses/>.  */

section memory
  /*random_seed = 12345
  type = random*/
  pattern = 0x00
  type = unknown /* Fastest */

  name = "RAM"
  ce = 1
  baseaddr = 0x00000000
  size = 0x00200000
  delayr = 1
  delayw = 2
end

section memory
  /*random_seed = 12345
  type = random*/
  pattern = 0x00
  type = unknown /* Fastest */

  name = "FLASH"
  ce = 0
  baseaddr = 0xf0000000
  size = 0x00200000
  delayr = 10
  delayw = -1
end

section immu
  enabled = 1
  nsets = 64
  nways = 1
  ustates = 2
  pagesize = 8192
end

section dmmu
  enabled = 1
  nsets = 64
  nways = 1
  ustates = 2
  pagesize = 8192
end

section ic
  enabled = 1
  nsets = 256
  nways = 1
  ustates = 2
  blocksize = 16
end

section dc
  enabled = 1
  nsets = 256
  nways = 1
  ustates = 2
  blocksize = 16
end

section sim
  /* verbose = 1 */
  debug = 0
  profile = 0
  prof_fn = "sim.profile"

  history = 1
  /* iprompt = 0 */
  exe_log = 0
  exe_log_fn = "executed.log"
end

section mc
  enabled = 1
  baseaddr = 0x93000000
  POC = 0x00000008                 /* Power on configuration register */
end