OpenCores

URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [rtl/] [verilog/] [usbhostslave/] [README] - Rev 547

Go to most recent revision | Compare with Previous | Blame | View Log

USB 1.1 host/slave RTL

http://opencores.org/project,usbhostslave

This RTL contains both usbhost and slave cores. See the top-level files, usbhost.v, usbslave.v and usbhostslave.v for the desired configuration of the core.

Include files are prefixed with usbhostslave_ in the include/ directory.

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.