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[/] [or1k/] [branches/] [stable_0_2_x/] [or1ksim/] [testbench/] [mmu.cfg] - Rev 1779
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section memory/*random_seed = 12345type = random*/pattern = 0x00type = unknown /* Fastest */name = "RAM"ce = 1baseaddr = 0x00000000size = 0x00200000delayr = 1delayw = 2endsection memory/*random_seed = 12345type = random*/pattern = 0x00type = unknown /* Fastest */name = "FLASH"ce = 0baseaddr = 0xf0000000size = 0x00200000delayr = 10delayw = -1endsection immuenabled = 1nsets = 64nways = 1ustates = 2pagesize = 8192endsection dmmuenabled = 1nsets = 64nways = 1ustates = 2pagesize = 8192endsection icenabled = 1nsets = 256nways = 1ustates = 2blocksize = 16endsection dcenabled = 1nsets = 256nways = 1ustates = 2blocksize = 16endsection sim/* verbose = 1 */debug = 0profile = 0prof_fn = "sim.profile"history = 1/* iprompt = 0 */exe_log = 0exe_log_fn = "executed.log"endsection mcenabled = 1baseaddr = 0x93000000POC = 0x00000008 /* Power on configuration register */end
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