URL
https://opencores.org/ocsvn/or1k/or1k/trunk
Subversion Repositories or1k
[/] [or1k/] [trunk/] [linux/] [linux-2.4/] [arch/] [or32/] [README.or32] - Rev 1781
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This is a port of Linux to OpenRISC 1000 family of microprocessors. More
information can be found at:
http://www.opencores.org/projects/or1k/
Changes:
18. 11. 2003 Matjaz Breskvar (phoenix@opencores.org)
initial port of linux to OpenRISC/or32 architecture.
all the core stuff is implemented and seams usable.
08. 12. 2003 Matjaz Breskvar (phoenix@opencores.org)
complete change of TLB miss handling.
rewrite of exceptions handling.
fully functional sash-3.6 in default initrd.
a much improved version with changes all around.
10. 04. 2004 Matjaz Breskvar (phoenix@opencores.org)
alot of bugfixes all over.
ethernet support, functional http and telnet servers.
running many standard linux apps.
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