Subversion Repositories phr

EESchema-LIBRARY Version 2.3  29/04/2008-12:22:33
# Converted with eagle2kicad.ulp Version 0.9
# Device count = 9
#
# Dev Name: LT1016CN
# Package Name: DIL08
# Dev Tech: ''
# Dev Prefix: IC
# Gate count = 1
#
DEF LT1016CN IC 0 40 Y Y 1 L N
# Gate Name: G$1
# Symbol Name: LT1016
F0 "IC" -390 255 50 H V L B
F1 "LT1016CN" 130 200 50 H V L B
F2 "linear-technology-DIL08" 0 150 50 H I C C
DRAW
P 2 1 0 0 -250 125 -250 75
P 2 1 0 0 -275 100 -225 100
P 2 1 0 0 -275 -100 -225 -100
P 2 1 0 0 -300 200 -300 -200
P 2 1 0 0 -300 -200 300 0
P 2 1 0 0 300 0 -300 200
P 2 1 0 0 0 200 0 103
P 2 1 0 0 300 -100 224 -32
P 2 1 0 0 100 -73 100 -100
P 2 1 0 0 -100 -133 -100 -200
P 2 1 0 0 300 -120 380 -120
P 2 1 0 0 0 -103 0 -200
P 2 1 0 0 300 100 224 28
T 0 57 276 32 0 1 0 V+
T 0 47 -274 32 0 1 0 V-
T 0 353 -144 32 0 1 0 OUT
T 0 353 66 32 0 1 0 OUT
T 1 134 -137 32 0 1 0 GND
T 1 -96 -73 32 0 1 0 EN
X +IN 2 -400 100 100 R 40 40 1 1 I 
X -IN 3 -400 -100 100 R 40 40 1 1 I 
X GND 6 100 -200 100 U 40 40 1 1 W 
X LA_EN 5 -100 -300 100 U 40 40 1 1 I 
X OUT 7 400 100 100 L 40 40 1 1 O 
X OUT\ 8 400 -100 100 L 40 40 1 1 O 
X V+ 1 0 300 100 D 40 40 1 1 W 
X V- 4 0 -300 100 U 40 40 1 1 W 
ENDDRAW
ENDDEF

#
# Dev Name: LT1016CS8
# Package Name: SOIC8
# Dev Tech: ''
# Dev Prefix: IC
# Gate count = 1
#
DEF LT1016CS8 IC 0 40 Y Y 1 L N
# Gate Name: G$1
# Symbol Name: LT1016
F0 "IC" -390 255 50 H V L B
F1 "LT1016CS8" 130 200 50 H V L B
F2 "linear-technology-SOIC8" 0 150 50 H I C C
DRAW
P 2 1 0 0 -250 125 -250 75
P 2 1 0 0 -275 100 -225 100
P 2 1 0 0 -275 -100 -225 -100
P 2 1 0 0 -300 200 -300 -200
P 2 1 0 0 -300 -200 300 0
P 2 1 0 0 300 0 -300 200
P 2 1 0 0 0 200 0 103
P 2 1 0 0 300 -100 224 -32
P 2 1 0 0 100 -73 100 -100
P 2 1 0 0 -100 -133 -100 -200
P 2 1 0 0 300 -120 380 -120
P 2 1 0 0 0 -103 0 -200
P 2 1 0 0 300 100 224 28
T 0 57 276 32 0 1 0 V+
T 0 47 -274 32 0 1 0 V-
T 0 353 -144 32 0 1 0 OUT
T 0 353 66 32 0 1 0 OUT
T 1 134 -137 32 0 1 0 GND
T 1 -96 -73 32 0 1 0 EN
X +IN 2 -400 100 100 R 40 40 1 1 I 
X -IN 3 -400 -100 100 R 40 40 1 1 I 
X GND 6 100 -200 100 U 40 40 1 1 W 
X LA_EN 5 -100 -300 100 U 40 40 1 1 I 
X OUT 7 400 100 100 L 40 40 1 1 O 
X OUT\ 8 400 -100 100 L 40 40 1 1 O 
X V+ 1 0 300 100 D 40 40 1 1 W 
X V- 4 0 -300 100 U 40 40 1 1 W 
ENDDRAW
ENDDEF

#
# Dev Name: LT1080
# Package Name: LT1080
# Dev Tech: ''
# Dev Prefix: 
# Gate count = 1
#
DEF LT1080 ?? 0 40 Y Y 1 L N
# Gate Name: G$1
# Symbol Name: LT1080
DRAW
P 2 1 0 0 -300 500 300 500
P 2 1 0 0 300 500 300 -500
P 2 1 0 0 300 -500 -300 -500
P 2 1 0 0 -300 -500 -300 500
T 0 50 625 50 0 1 0 LT1080
X C1+ 2 -500 300 200 R 40 40 1 1 B 
X C1- 4 -500 100 200 R 40 40 1 1 B 
X C2+ 5 -500 0 200 R 40 40 1 1 B 
X C2- 6 -500 -100 200 R 40 40 1 1 B 
X GND 16 500 200 200 L 40 40 1 1 B 
X NC 1 -500 400 200 R 40 40 1 1 B 
X ON/OFF 18 500 400 200 L 40 40 1 1 B 
X REC1IN 14 500 0 200 L 40 40 1 1 B 
X REC1OUT 13 500 -100 200 L 40 40 1 1 B 
X REC2IN 9 -500 -400 200 R 40 40 1 1 B 
X REC2OUT 10 500 -400 200 L 40 40 1 1 B 
X TR1IN 12 500 -200 200 L 40 40 1 1 B 
X TR1OUT 15 500 100 200 L 40 40 1 1 B 
X TR2IN 11 500 -300 200 L 40 40 1 1 B 
X TR2OUT 8 -500 -300 200 R 40 40 1 1 B 
X V+ 3 -500 200 200 R 40 40 1 1 B 
X V- 7 -500 -200 200 R 40 40 1 1 B 
X VCC 17 500 300 200 L 40 40 1 1 B 
ENDDRAW
ENDDEF

#
# Dev Name: LT1129CQ-5
# Package Name: Q5-DD
# Dev Tech: ''
# Dev Prefix: IC
# Gate count = 1
#
DEF LT1129CQ-5 IC 0 40 Y Y 1 L N
# Gate Name: G$1
# Symbol Name: LT1129
F0 "IC" -300 250 50 H V L B
F1 "LT1129CQ-5" 100 250 50 H V L B
F2 "linear-technology-Q5-DD" 0 150 50 H I C C
DRAW
P 2 1 0 0 -300 200 300 200
P 2 1 0 0 300 200 300 -300
P 2 1 0 0 300 -300 -300 -300
P 2 1 0 0 -300 -300 -300 200
T 0 10 -230 60 0 1 0 GND
X GND 3 0 -400 100 U 40 40 1 1 W 
X IN 5 -400 100 100 R 40 40 1 1 I 
X OUT 1 400 100 100 L 40 40 1 1 O 
X SENSE 2 400 0 100 L 40 40 1 1 I 
X SHDN\ 4 -400 -100 100 R 40 40 1 1 I 
ENDDRAW
ENDDEF

#
# Dev Name: LT1129CS8
# Package Name: SOIC8
# Dev Tech: ''
# Dev Prefix: IC
# Gate count = 4
#
DEF LT1129CS8 IC 0 40 Y Y 4 L N
# Gate Name: G$1
# Symbol Name: LT1129
F0 "IC" -300 250 50 H V L B
F1 "LT1129CS8" 100 250 50 H V L B
F2 "linear-technology-SOIC8" 0 150 50 H I C C
DRAW
P 2 1 0 0 -300 200 300 200
P 2 1 0 0 300 200 300 -300
P 2 1 0 0 300 -300 -300 -300
P 2 1 0 0 -300 -300 -300 200
T 0 10 -230 60 0 1 0 GND
X GND 3 0 -400 100 U 40 40 1 1 W 
X IN 8 -400 100 100 R 40 40 1 1 I 
X OUT 1 400 100 100 L 40 40 1 1 O 
X SENSE 2 400 0 100 L 40 40 1 1 I 
X SHDN\ 5 -400 -100 100 R 40 40 1 1 I 
# Gate Name: G$2
# Symbol Name: NC
X NC 4 0 -100 100 U 40 40 2 1 U 
# Gate Name: G1
# Symbol Name: GND
X GND 6 0 -100 100 U 40 40 3 1 W 
# Gate Name: G2
# Symbol Name: GND
X GND 7 0 -100 100 U 40 40 4 1 W 
ENDDRAW
ENDDEF

#
# Dev Name: LT1129CST5
# Package Name: SOT223
# Dev Tech: ''
# Dev Prefix: IC
# Gate count = 2
#
DEF LT1129CST5 IC 0 40 Y Y 2 L N
# Gate Name: G$1
# Symbol Name: LT1129-3
F0 "IC" -300 250 50 H V L B
F1 "LT1129CST5" 100 250 50 H V L B
F2 "linear-technology-SOT223" 0 150 50 H I C C
DRAW
P 2 1 0 0 -300 200 300 200
P 2 1 0 0 300 200 300 -100
P 2 1 0 0 300 -100 -300 -100
P 2 1 0 0 -300 -100 -300 200
T 0 10 -30 60 0 1 0 GND
X GND 2 0 -200 100 U 40 40 1 1 W 
X IN 1 -400 100 100 R 40 40 1 1 I 
X OUT 3 400 100 100 L 40 40 1 1 O 
# Gate Name: GND
# Symbol Name: GND
X GND 4 0 -100 100 U 40 40 2 1 W 
ENDDRAW
ENDDEF

#
# Dev Name: LT1129CT-5
# Package Name: TO220-5
# Dev Tech: ''
# Dev Prefix: IC
# Gate count = 1
#
DEF LT1129CT-5 IC 0 40 Y Y 1 L N
# Gate Name: G$1
# Symbol Name: LT1129
F0 "IC" -300 250 50 H V L B
F1 "LT1129CT-5" 100 250 50 H V L B
F2 "linear-technology-TO220-5" 0 150 50 H I C C
DRAW
P 2 1 0 0 -300 200 300 200
P 2 1 0 0 300 200 300 -300
P 2 1 0 0 300 -300 -300 -300
P 2 1 0 0 -300 -300 -300 200
T 0 10 -230 60 0 1 0 GND
X GND 3 0 -400 100 U 40 40 1 1 W 
X IN 5 -400 100 100 R 40 40 1 1 I 
X OUT 1 400 100 100 L 40 40 1 1 O 
X SENSE 2 400 0 100 L 40 40 1 1 I 
X SHDN\ 4 -400 -100 100 R 40 40 1 1 I 
ENDDRAW
ENDDEF

#
# Dev Name: LT1310
# Package Name: SOIC8
# Dev Tech: ''
# Dev Prefix: 
# Gate count = 1
#
DEF LT1310 ?? 0 40 Y Y 1 L N
# Gate Name: G$1
# Symbol Name: LT1310
DRAW
P 2 1 0 0 -200 300 200 300
P 2 1 0 0 200 300 200 -200
P 2 1 0 0 200 -200 -200 -200
P 2 1 0 0 -200 -200 -200 300
T 0 36 363 50 0 1 0 LT1310
X 1/GND 1 -400 200 200 R 40 40 1 1 B 
X 2/SEL 2 -400 100 200 R 40 40 1 1 B 
X 3/SHDN 3 -400 0 200 R 40 40 1 1 B 
X 4/SENSE 4 -400 -100 200 R 40 40 1 1 B 
X 5/ILIM 5 400 -100 200 L 40 40 1 1 B 
X 6/VIN 6 400 0 200 L 40 40 1 1 B 
X 7/SW 7 400 100 200 L 40 40 1 1 B 
X 8/PGND 8 400 200 200 L 40 40 1 1 B 
ENDDRAW
ENDDEF

#
# Dev Name: LTC1658MS8
# Package Name: MSOP8
# Dev Tech: ''
# Dev Prefix: IC
# Gate count = 1
#
DEF LTC1658MS8 IC 0 40 Y Y 1 L N
# Gate Name: G$1
# Symbol Name: LTC1658
F0 "IC" -400 525 50 H V L B
F1 "LTC1658MS8" -400 -600 50 H V L B
F2 "linear-technology-MSOP8" 0 150 50 H I C C
DRAW
P 2 1 0 0 -400 -500 400 -500
P 2 1 0 0 400 -500 400 500
P 2 1 0 0 400 500 -400 500
P 2 1 0 0 -400 500 -400 -500
X CLK 1 -500 -100 100 R 40 40 1 1 I 
X CS\LD 3 -500 -200 100 R 40 40 1 1 I 
X DIN 2 -500 0 100 R 40 40 1 1 I 
X DOUT 4 500 0 100 L 40 40 1 1 O 
X GND 5 -500 -400 100 R 40 40 1 1 W 
X VCC 8 -500 400 100 R 40 40 1 1 W 
X VOUT 7 500 300 100 L 40 40 1 1 O 
X VREF 6 -500 200 100 R 40 40 1 1 I 
ENDDRAW
ENDDEF

#End Library