Architectures | |
struct | Architecture |
Libraries | |
ieee | |
Packages | |
std_logic_1164 | |
std_logic_arith | |
Ports | |
clk | in std_logic |
Active high asynchronous clear. | |
clr | in std_logic |
Rising edge clock. | |
hlt | out std_logic |
Halt signal to stop processing data. | |
q3 | out std_logic_vector ( 7 downto 0 ) |
8-bit output |