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https://opencores.org/ocsvn/sardmips/sardmips/trunk
Subversion Repositories sardmips
[/] [sardmips/] [trunk/] [PROGRAMMING_CLASSIC/] [link.xn] - Rev 4
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/*
* Linker script for the mips programs. Created for the 32bit mips
* little endian achitecture.
*/
OUTPUT(program.elf) /* Default output name */
OUTPUT_ARCH(mips) /* Output arch is mips... no shit :-) */
ENTRY(_start) /* Entry point for program */
SECTIONS
{
/**** Code and read-only data ****/
. = 0x00000000; /* Here the code should be loaded so we */
/* set the location counter to this */
/* address. */
.text . : {
_ftext = .; /* Start of code and read-only data */
crt0.o (.text) /* This must be the first file since */
/* this has the program entry point */
*(.text) /* The rest of the object files */
_ecode = .; /* End of code */
*(.rodata)
. = ALIGN(8);
_etext = .; /* End of code and read-only data */
} = 0
.reginfo : { *(.reginfo) } /* Contains masks of registers used and */
/* $gp value ($gp register is not used) */
/**** Initialised data ****/
.data :
{
_fdata = .; /* Start of initialised data */
*(.data)
. = ALIGN(8);
*(.lit8) /* Place 8-byte constants here */
*(.lit4) /* Place 4-byte constants here */
*(.sdata) /* Place subsequent data */
. = ALIGN(8);
_edata = .; /* End of initialised data */
}
.reginfo :
{
/**/
}
/**** Uninitialised data ****/
. = 0x00000000;
_fbss = .; /* Start of uninitialised data */
.sbss :
{
*(.dynsbss)
*(.sbss)
*(.sbss.*)
*(.scommon) /* Place small common symbols here */
}
.bss :
{
*(.dynbss)
*(.bss)
*(.bss.*)
*(COMMON) /* Place common symbols here */
_sp_end = .;
/* Allocate room for stack */
. = ALIGN(8) ;
. = 0x4000 ;
_sp = . - 16;
}
_end = .; /* End of unitialised data */
}
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