Single 14 Segment Display Driver with Limited ASCII Decoder
0.1
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Architecture definition of the DisplayDriverwDecoder_Top. More...
Processes | |
ascii_in_reg | ( clk ) |
Signals | |
ascii_reg | std_logic_vector ( 7 downto 0 ) |
Attributes | |
syn_noprune | boolean |
syn_noprune | ascii_reg : signal is true |
Architecture definition of the DisplayDriverwDecoder_Top.
Detailed description of the DisplayDriverwDecoder_Top architecture.