|
clk | in |
| input clock, xx MHz.
|
reset | in |
ascii_in | in ( 7 downto 0 ) |
| input ascii code to be displayed
|
disp_data_q | out ( 14 downto 0 ) |
| decoded ascii code output with symbol bit map
|
◆ ascii_in
input ascii code to be displayed
ascii_in(7) represents the DP state so it is not decoded. Symbol codes from 0x00 to 0x7F are without DP lit. Symbol codes from 0x80 to 0xFF have DP lit.
The documentation for this class was generated from the following file:
- C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/ascii_decoder.vhd