test Architecture Reference

Processes
PROCESS_0	( )

Components
decoder_table_dist_rom	<Entity decoder_table_dist_rom>

Signals
Address	std_logic_vector ( 6 downto 0 ) := ( others = > ' 0 ' )
Q	std_logic_vector ( 13 downto 0 )

Instantiations
u1	decoder_table_dist_rom <Entity decoder_table_dist_rom>

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The documentation for this class was generated from the following file:

• C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/decoder_table_dist_rom_impl/decoder_table_dist_rom/tb_decoder_table_dist_rom_tmpl.vhd