#-- Synopsys, Inc. #-- Version L-2016.03L-1 #-- Project file C:\Projects\single-14-segment-display-driver-w-decoder\Project\Lattice_FPGA_Build\impl1\run_options.txt #project files add_file -vhdl -lib work "C:/lscc/diamond/3.8_x64/cae_library/synthesis/vhdl/ecp5um.vhd" add_file -vhdl -lib work "C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/Decoding_Table/ROM_ASCII_Decoder/decoder_table_dist_rom_impl/decoder_table_dist_rom/decoder_table_dist_rom.vhd" add_file -vhdl -lib work "C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/ascii_decoder.vhd" add_file -vhdl -lib work "C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/display_driver_w_decoder.vhd" add_file -vhdl -lib work "C:/Projects/single-14-segment-display-driver-w-decoder/Project/Sources/display_driver_wrapper.vhd" #implementation: "impl1" impl -add impl1 -type fpga # #implementation attributes set_option -vlog_std v2001 set_option -project_relative_includes 1 #device options set_option -technology ECP5UM5G set_option -part LFE5UM5G_45F set_option -package BG381C set_option -speed_grade -8 set_option -part_companion "" #compilation/mapping options set_option -top_module "display_driver_wrapper" # hdl_compiler_options set_option -distributed_compile 0 # mapper_without_write_options set_option -frequency auto set_option -srs_instrumentation 1 # mapper_options set_option -write_verilog 0 set_option -write_vhdl 0 # Lattice XP set_option -maxfan 1000 set_option -disable_io_insertion 0 set_option -retiming 0 set_option -pipe 1 set_option -forcegsr false set_option -fix_gated_and_generated_clocks 1 set_option -rw_check_on_ram 1 set_option -update_models_cp 0 set_option -syn_edif_array_rename 1 set_option -Write_declared_clocks_only 1 # NFilter set_option -no_sequential_opt 0 # sequential_optimization_options set_option -symbolic_fsm_compiler 1 # Compiler Options set_option -compiler_compatible 0 set_option -resource_sharing 1 set_option -multi_file_compilation_unit 1 # Compiler Options set_option -auto_infer_blackbox 0 #automatic place and route (vendor) options set_option -write_apr_constraint 1 #set result format/file last project -result_file "./DisplayDriverwDecoder_impl1.edi" #set log file set_option log_file "C:/Projects/single-14-segment-display-driver-w-decoder/Project/Lattice_FPGA_Build/impl1/DisplayDriverwDecoder_impl1.srf" impl -active "impl1"