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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [wishbone/] [doc/] [Heda/] [absDef/] [wb_b.4_rtl.txt] - Rev 135
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opencores.org:wishbone:wb:b.4_rtl
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Filename: ./projects/opencores.org/wishbone/busDefs/abstractors/wb_b.4_rtl.xml
VLNV-ad opencores.org_wishbone_wb_b.4_rtl
VLNV-bt opencores.org_wishbone_wb_b.4
SystemGroup Name CLOCK
SystemGroup Name RESET
SystemGroup Name ENABLE
Port: clk CLOCK Requires Driver clock
onMaster presence required
onMaster width 1
onMaster direction in
onSlave presence required
onSlave width 1
onSlave direction in
Port: enable
onMaster presence optional
onMaster width 1
onMaster direction in
onSlave presence optional
onSlave width 1
onSlave direction in
Port: rst RESET Requires Driver singleShot
onMaster presence required
onMaster width 1
onMaster direction in
onSlave presence required
onSlave width 1
onSlave direction in
Port: adr
onMaster presence required
onMaster width 1
onMaster direction out
onSlave presence required
onSlave width 1
onSlave direction in
Port: cyc
onMaster presence required
onMaster width 1
onMaster direction out
onSlave presence required
onSlave width 1
onSlave direction in
Port: wdata
onMaster presence required
onMaster width 1
onMaster direction out
onSlave presence required
onSlave width 1
onSlave direction in
Port: rdata
onMaster presence required
onMaster width 1
onMaster direction in
onSlave presence required
onSlave width 1
onSlave direction out
Port: ack
onMaster presence required
onMaster width 1
onMaster direction in
onSlave presence required
onSlave width 1
onSlave direction out
Port: err
onMaster presence required
onMaster width 1
onMaster direction in
onSlave presence required
onSlave width 1
onSlave direction out
Port: rty
onMaster presence required
onMaster width 1
onMaster direction in
onSlave presence required
onSlave width 1
onSlave direction out
Port: stall
onMaster presence required
onMaster width 1
onMaster direction in
onSlave presence required
onSlave width 1
onSlave direction out
Port: lock
onMaster presence required
onMaster width 1
onMaster direction out
onSlave presence required
onSlave width 1
onSlave direction in
Port: sel
onMaster presence required
onMaster width 1
onMaster direction out
onSlave presence required
onSlave width 1
onSlave direction in
Port: stb
onMaster presence required
onMaster width 1
onMaster direction out
onSlave presence required
onSlave width 1
onSlave direction in
Port: wtgd
onMaster presence required
onMaster width 1
onMaster direction out
onSlave presence required
onSlave width 1
onSlave direction in
Port: rtgd
onMaster presence required
onMaster width 1
onMaster direction in
onSlave presence required
onSlave width 1
onSlave direction out
Port: tga
onMaster presence required
onMaster width 1
onMaster direction out
onSlave presence required
onSlave width 1
onSlave direction in
Port: tgc
onMaster presence required
onMaster width 1
onMaster direction out
onSlave presence required
onSlave width 1
onSlave direction in
Port: we
onMaster presence required
onMaster width 1
onMaster direction out
onSlave presence required
onSlave width 1
onSlave direction in
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