page2
owr_p[i]
owr_p[i] | owr_e[i]
owr_i[i]
power
select
control
/
status
owr_e
state
machine
7/8bit
counter
owr_i
owr_p
clk
bus_wen
clock generator
ovd
pls
bus_ren
bus_rdt
rst
dat
bus_wdt
bus_irq
clk
bus_wen
bus_ren
bus_wdt
bus_rdt
bus_irq
bus_adr
owr[i]
bus_adr
cdr_n
cdr_o
irq
cyc