# Copyright 2013, 2015, Sinclair R.F., Inc.
# Test bench for UART_Rx peripheral.

ARCHITECTURE    core/9x8 Verilog
INSTRUCTION     64
DATA_STACK      8
RETURN_STACK    2

PARAMETER       G_CLK_FREQ_HZ   100_000_000
PARAMETER       G_BAUD          115200

PERIPHERAL      UART_Rx         inport=I_UART_RX                \
                                inempty=I_UART_RX_EMPTY         \
                                insignal=i_uart_rx              \
                                baudmethod=G_CLK_FREQ_HZ/G_BAUD

OUTPORT 8-bit,strobe o_data,o_data_wr O_DATA

OUTPORT 1-bit o_done O_DONE

ASSEMBLY tb_UART_Rx.s