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[/] [tv80/] [trunk/] [doc/] [tv80_docs.xml] - Rev 25
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<?xml version="1.0"?>
<!DOCTYPE rfc SYSTEM "rfc2629.dtd">
<?rfc toc="yes"?>
<?rfc private="$Rev$"?>
<?rfc compact="yes"?>
<rfc>
<front>
<title>tv80 Core Documentation</title>
<author initials="G." surname="Hutchison" fullname="Guy Hutchison">
<organization>OpenCores.org</organization>
<email>ghutchis@opencores.org</email>
</author>
<date month="October" year="2004" />
<area>General</area>
<keyword>private</keyword>
<keyword>XML</keyword>
<keyword>Extensible Markup Language</keyword>
<abstract><t>
A synthesizable 8-bit microprocessor which is instruction-set compatable
with the Z80, targetted at embedded and system-on-a-chip designs.
</t></abstract>
</front>
<middle>
<section title="Verification Environment">
<section title="Memory Map">
<t>
Environment memory space is divided into a 32k ROM region and a 32k RAM
region, as follows:
<figure>
<artwork>
0000-7FFF: ROM
8000-FFFF: RAM
</artwork>
</figure>
<t>Environment I/O space is allocated as follows:</t>
<figure>
<artwork>
00-0F: Unused
10-1F: Test devices
20-7F: Unused
80-9F: Environment control
A0-FF: Unused
</artwork></figure>
</t>
</section>
<section title="Control Registers">
The tv80 environment is controlled by the program under simulation. The
program can affect the environment through a set of control registers,
which are mapped into I/O space.
<section title="Simulation control (0x80)">
<figure>
<artwork>
Write '01' to end simulation with test passed
Write '02' to end with test failed
Write '03' to turn on dumping
Write '04' to turn off dumping
</artwork>
</figure>
</section>
<section title="Message output (0x81)">
<t>
Write characters to this port one at a time. When the
newline ('\n', ASCII 0x0A) character is written, the
environment will print out the collected string.
</t>
</section>
<section title="Timeout control (0x82)">
<figure>
<artwork>
Bit[0] enables the timeout counter
Bit[1] resets the counter to 0
Timeout counter defaults to enabled at simulation start
</artwork>
</figure>
</section>
<section title="Max timeout (0x84, 0x83)">
<t>
Holds 16-bit timeout value (amount of time in clocks before
timeout error occurs).
</t>
</section>
<section title="Interrupt countdown (0x90)">
<t>
When set, starts a countdown (in clocks) until assertion of
the INT_N signal.
</t>
</section>
</section>
</section>
</middle>
<back>
</back>
</rfc>
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