#### Generation Settings

Component declarations | yes
Configurations | embedded statements
add pragmas
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#### Declarations

#### Ports:

    clk_clk_i      : std_logic
    d_i            : std_logic_vector(7 DOWNTO 0)
    rdy_i          : std_logic
    irq_n_i        : std_logic
    so_n_i         : std_logic
    a_o            : std_logic_vector(15 DOWNTO 0)
    d_o            : std_logic_vector(7 DOWNTO 0)
    rd_o           : std_logic
    wr_o           : std_logic
    wr_n_o         : std_logic
    sync_o         : std_logic
    rst_rst_n_i    : std_logic
    nmi_n_i        : std_logic

#### Diagram Signals:

    signal adr_o_i        : std_logic_vector(15 DOWNTO 0)
    signal offset_o_i     : std_logic_vector(15 DOWNTO 0)
    signal ch_a_o_i       : std_logic_vector(7 DOWNTO 0)
    signal ch_b_o_i       : std_logic_vector(7 DOWNTO 0)
    signal adr_sp_o_i     : std_logic_vector(15 DOWNTO 0)
    signal adr_pc_o_i     : std_logic_vector(15 DOWNTO 0)
    signal load_regs_o_i  : std_logic
    signal ld_o_i         : std_logic_vector(1 DOWNTO 0)
    signal reg_0flag_o_i  : std_logic
    signal reg_1flag_o_i  : std_logic
    signal reg_7flag_o_i  : std_logic
    signal d_regs_out_o_i : std_logic_vector(7 DOWNTO 0)
    signal d_alu_o_i      : std_logic_vector(7 DOWNTO 0)
    signal sel_reg_o_i    : std_logic_vector(1 DOWNTO 0)
    signal ld_pc_o_i      : std_logic
    signal sel_rb_out_o_i : std_logic_vector(1 DOWNTO 0)
    signal sel_rb_in_o_i  : std_logic_vector(1 DOWNTO 0)
    signal sel_pc_in_o_i  : std_logic
    signal ld_sp_o_i      : std_logic
    signal sel_sp_in_o_i  : std_logic
    signal sel_pc_val_o_i : std_logic_vector(1 DOWNTO 0)
    signal sel_sp_as_o_i  : std_logic
    signal adr_nxt_pc_o_i : std_logic_vector(15 DOWNTO 0)
    signal q_a_o_i        : std_logic_vector(7 DOWNTO 0)
    signal q_x_o_i        : std_logic_vector(7 DOWNTO 0)
    signal q_y_o_i        : std_logic_vector(7 DOWNTO 0)
    signal d_regs_in_o_i  : std_logic_vector(7 DOWNTO 0)
    signal nmi_o_i        : std_logic
    signal d_alu_n_o_i    : std_logic
    signal d_alu_or_o_i   : std_logic
    signal rst_nmi_o_i    : std_logic

#### Pre User:

#### Post User:

#### Package List

    LIBRARY ieee;
    USE ieee.std_logic_1164.all;
    USE ieee.std_logic_arith.all;

#### Bundles