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[/] [mesi_isc/] [trunk/] [sim/] [run_sim] - Rev 3

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#//////////////////////////////////////////////////////////////////
#////                                                              ////
#//// Copyright (C) 2009 Authors and OPENCORES.ORG                 ////
#////                                                              ////
#//// This source file may be used and distributed without         ////
#//// restriction provided that this copyright statement is not    ////
#//// removed from the file and that any derivative work contains  ////
#//// the original copyright notice and the associated disclaimer. ////
#////                                                              ////
#//// This source file is free software; you can redistribute it   ////
#//// and/or modify it under the terms of the GNU Lesser General   ////
#//// Public License as published by the Free Software Foundation; ////
#//// either version 2.1 of the License, or (at your option) any   ////
#//// later version.                                               ////
#////                                                              ////
#//// This source is distributed in the hope that it will be       ////
#//// useful, but WITHOUT ANY WARRANTY; without even the implied   ////
#//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR      ////
#//// PURPOSE.  See the GNU Lesser General Public License for more ////
#//// details.                                                     ////
#////                                                              ////
#//// You should have received a copy of the GNU Lesser General    ////
#//// Public License along with this source; if not, download it   ////
#//// from http://www.opencores.org/lgpl.shtml                     ////
#////                                                              ////
#//////////////////////////////////////////////////////////////////////

#//////////////////////////////////////////////////////////////////////
#////                                                              ////
#////  MESI_ISC Project                                            ////
#////                                                              ////
#////  Author(s):                                                  ////
#////      - Yair Amitay       yair.amitay@yahoo.com               ////
#////                          www.linkedin.com/in/yairamitay      ////
#////                                                              ////
#//////////////////////////////////////////////////////////////////////

\rm mesi_isc.out
iverilog -o mesi_isc.out \
         -I ../src/rtl   \
         -I ../src/tb    \
         -y ../src/rtl   \
         -y ../src/tb    \
         -c sim.cmd      \
         -v              \
         > iverilog.log
grep error iverilog.log
vvp -l sim.log \
       mesi_isc.out

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