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PowerPlay Power Analyzer report for mesi_isc
Sun Dec 23 11:48:56 2012
Quartus II 32-bit Version 12.0 Build 263 08/02/2012 Service Pack 2 SJ Web Edition


---------------------
; Table of Contents ;
---------------------
  1. Legal Notice
  2. PowerPlay Power Analyzer Summary
  3. PowerPlay Power Analyzer Settings
  4. Indeterminate Toggle Rates
  5. Operating Conditions Used
  6. Thermal Power Dissipation by Block
  7. Thermal Power Dissipation by Block Type
  8. Thermal Power Dissipation by Hierarchy
  9. Core Dynamic Thermal Power Dissipation by Clock Domain
 10. Current Drawn from Voltage Supplies Summary
 11. VCCIO Supply Current Drawn by I/O Bank
 12. VCCIO Supply Current Drawn by Voltage
 13. Confidence Metric Details
 14. Signal Activities
 15. PowerPlay Power Analyzer Messages



----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2012 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+-------------------------------------------------------------------------------------------+
; PowerPlay Power Analyzer Summary                                                          ;
+----------------------------------------+--------------------------------------------------+
; PowerPlay Power Analyzer Status        ; Successful - Sun Dec 23 11:48:56 2012            ;
; Quartus II 32-bit Version              ; 12.0 Build 263 08/02/2012 SP 2 SJ Web Edition    ;
; Revision Name                          ; mesi_isc                                         ;
; Top-level Entity Name                  ; mesi_isc                                         ;
; Family                                 ; Cyclone IV GX                                    ;
; Device                                 ; EP4CGX30CF23C6                                   ;
; Power Models                           ; Final                                            ;
; Total Thermal Power Dissipation        ; 178.89 mW                                        ;
; Core Dynamic Thermal Power Dissipation ; 0.00 mW                                          ;
; Core Static Thermal Power Dissipation  ; 118.11 mW                                        ;
; I/O Thermal Power Dissipation          ; 60.78 mW                                         ;
; Power Estimation Confidence            ; Low: user provided insufficient toggle rate data ;
+----------------------------------------+--------------------------------------------------+


+------------------------------------------------------------------------------------------------------+
; PowerPlay Power Analyzer Settings                                                                    ;
+----------------------------------------------------------------------------+---------+---------------+
; Option                                                                     ; Setting ; Default Value ;
+----------------------------------------------------------------------------+---------+---------------+
; Use smart compilation                                                      ; Off     ; Off           ;
; Enable parallel Assembler and TimeQuest Timing Analyzer during compilation ; On      ; On            ;
; Enable compact report table                                                ; Off     ; Off           ;
; Default Power Toggle Rate                                                  ; 12.5%   ; 12.5%         ;
; Default Power Input I/O Toggle Rate                                        ; 12.5%   ; 12.5%         ;
; Use vectorless estimation                                                  ; On      ; On            ;
; Use Input Files                                                            ; Off     ; Off           ;
; Filter Glitches in VCD File Reader                                         ; On      ; On            ;
; Power Analyzer Report Signal Activity                                      ; Off     ; Off           ;
; Power Analyzer Report Power Dissipation                                    ; Off     ; Off           ;
; Device Power Characteristics                                               ; TYPICAL ; TYPICAL       ;
; Automatically Compute Junction Temperature                                 ; On      ; On            ;
; Specified Junction Temperature                                             ; 25      ; 25            ;
; Ambient Temperature                                                        ; 25      ; 25            ;
; Use Custom Cooling Solution                                                ; Off     ; Off           ;
; Board Temperature                                                          ; 25      ; 25            ;
; Enable HPS                                                                 ; Off     ; Off           ;
; Processor Frequency                                                        ; 0.0     ; 0.0           ;
+----------------------------------------------------------------------------+---------+---------------+


+------------------------------------------------+
; Indeterminate Toggle Rates                     ;
+------------------+-----------------------------+
; Node             ; Reason                      ;
+------------------+-----------------------------+
; clk              ; No valid clock domain found ;
; rst              ; No valid clock domain found ;
; cbus_ack3_i      ; No valid clock domain found ;
; cbus_ack2_i      ; No valid clock domain found ;
; cbus_ack1_i      ; No valid clock domain found ;
; cbus_ack0_i      ; No valid clock domain found ;
; mbus_cmd3_i[0]   ; No valid clock domain found ;
; mbus_cmd3_i[1]   ; No valid clock domain found ;
; mbus_cmd3_i[2]   ; No valid clock domain found ;
; mbus_cmd2_i[0]   ; No valid clock domain found ;
; mbus_cmd2_i[1]   ; No valid clock domain found ;
; mbus_cmd2_i[2]   ; No valid clock domain found ;
; mbus_cmd1_i[0]   ; No valid clock domain found ;
; mbus_cmd1_i[1]   ; No valid clock domain found ;
; mbus_cmd1_i[2]   ; No valid clock domain found ;
; mbus_cmd0_i[0]   ; No valid clock domain found ;
; mbus_cmd0_i[1]   ; No valid clock domain found ;
; mbus_cmd0_i[2]   ; No valid clock domain found ;
; mbus_addr2_i[0]  ; No valid clock domain found ;
; mbus_addr3_i[0]  ; No valid clock domain found ;
; mbus_addr0_i[0]  ; No valid clock domain found ;
; mbus_addr1_i[0]  ; No valid clock domain found ;
; mbus_addr2_i[1]  ; No valid clock domain found ;
; mbus_addr3_i[1]  ; No valid clock domain found ;
; mbus_addr0_i[1]  ; No valid clock domain found ;
; mbus_addr1_i[1]  ; No valid clock domain found ;
; mbus_addr2_i[2]  ; No valid clock domain found ;
; mbus_addr3_i[2]  ; No valid clock domain found ;
; mbus_addr0_i[2]  ; No valid clock domain found ;
; mbus_addr1_i[2]  ; No valid clock domain found ;
; mbus_addr2_i[3]  ; No valid clock domain found ;
; mbus_addr3_i[3]  ; No valid clock domain found ;
; mbus_addr0_i[3]  ; No valid clock domain found ;
; mbus_addr1_i[3]  ; No valid clock domain found ;
; mbus_addr2_i[4]  ; No valid clock domain found ;
; mbus_addr3_i[4]  ; No valid clock domain found ;
; mbus_addr0_i[4]  ; No valid clock domain found ;
; mbus_addr1_i[4]  ; No valid clock domain found ;
; mbus_addr2_i[5]  ; No valid clock domain found ;
; mbus_addr3_i[5]  ; No valid clock domain found ;
; mbus_addr0_i[5]  ; No valid clock domain found ;
; mbus_addr1_i[5]  ; No valid clock domain found ;
; mbus_addr2_i[6]  ; No valid clock domain found ;
; mbus_addr3_i[6]  ; No valid clock domain found ;
; mbus_addr0_i[6]  ; No valid clock domain found ;
; mbus_addr1_i[6]  ; No valid clock domain found ;
; mbus_addr2_i[7]  ; No valid clock domain found ;
; mbus_addr3_i[7]  ; No valid clock domain found ;
; mbus_addr0_i[7]  ; No valid clock domain found ;
; mbus_addr1_i[7]  ; No valid clock domain found ;
; mbus_addr2_i[8]  ; No valid clock domain found ;
; mbus_addr3_i[8]  ; No valid clock domain found ;
; mbus_addr0_i[8]  ; No valid clock domain found ;
; mbus_addr1_i[8]  ; No valid clock domain found ;
; mbus_addr2_i[9]  ; No valid clock domain found ;
; mbus_addr3_i[9]  ; No valid clock domain found ;
; mbus_addr0_i[9]  ; No valid clock domain found ;
; mbus_addr1_i[9]  ; No valid clock domain found ;
; mbus_addr2_i[10] ; No valid clock domain found ;
; mbus_addr3_i[10] ; No valid clock domain found ;
; mbus_addr0_i[10] ; No valid clock domain found ;
; mbus_addr1_i[10] ; No valid clock domain found ;
; mbus_addr2_i[11] ; No valid clock domain found ;
; mbus_addr3_i[11] ; No valid clock domain found ;
; mbus_addr0_i[11] ; No valid clock domain found ;
; mbus_addr1_i[11] ; No valid clock domain found ;
; mbus_addr2_i[12] ; No valid clock domain found ;
; mbus_addr3_i[12] ; No valid clock domain found ;
; mbus_addr0_i[12] ; No valid clock domain found ;
; mbus_addr1_i[12] ; No valid clock domain found ;
; mbus_addr2_i[13] ; No valid clock domain found ;
; mbus_addr3_i[13] ; No valid clock domain found ;
; mbus_addr0_i[13] ; No valid clock domain found ;
; mbus_addr1_i[13] ; No valid clock domain found ;
; mbus_addr2_i[14] ; No valid clock domain found ;
; mbus_addr3_i[14] ; No valid clock domain found ;
; mbus_addr0_i[14] ; No valid clock domain found ;
; mbus_addr1_i[14] ; No valid clock domain found ;
; mbus_addr2_i[15] ; No valid clock domain found ;
; mbus_addr3_i[15] ; No valid clock domain found ;
; mbus_addr0_i[15] ; No valid clock domain found ;
; mbus_addr1_i[15] ; No valid clock domain found ;
; mbus_addr2_i[16] ; No valid clock domain found ;
; mbus_addr3_i[16] ; No valid clock domain found ;
; mbus_addr0_i[16] ; No valid clock domain found ;
; mbus_addr1_i[16] ; No valid clock domain found ;
; mbus_addr2_i[17] ; No valid clock domain found ;
; mbus_addr3_i[17] ; No valid clock domain found ;
; mbus_addr0_i[17] ; No valid clock domain found ;
; mbus_addr1_i[17] ; No valid clock domain found ;
; mbus_addr2_i[18] ; No valid clock domain found ;
; mbus_addr3_i[18] ; No valid clock domain found ;
; mbus_addr0_i[18] ; No valid clock domain found ;
; mbus_addr1_i[18] ; No valid clock domain found ;
; mbus_addr2_i[19] ; No valid clock domain found ;
; mbus_addr3_i[19] ; No valid clock domain found ;
; mbus_addr0_i[19] ; No valid clock domain found ;
; mbus_addr1_i[19] ; No valid clock domain found ;
; mbus_addr2_i[20] ; No valid clock domain found ;
; mbus_addr3_i[20] ; No valid clock domain found ;
; mbus_addr0_i[20] ; No valid clock domain found ;
; mbus_addr1_i[20] ; No valid clock domain found ;
; mbus_addr2_i[21] ; No valid clock domain found ;
; mbus_addr3_i[21] ; No valid clock domain found ;
; mbus_addr0_i[21] ; No valid clock domain found ;
; mbus_addr1_i[21] ; No valid clock domain found ;
; mbus_addr2_i[22] ; No valid clock domain found ;
; mbus_addr3_i[22] ; No valid clock domain found ;
; mbus_addr0_i[22] ; No valid clock domain found ;
; mbus_addr1_i[22] ; No valid clock domain found ;
; mbus_addr2_i[23] ; No valid clock domain found ;
; mbus_addr3_i[23] ; No valid clock domain found ;
; mbus_addr0_i[23] ; No valid clock domain found ;
; mbus_addr1_i[23] ; No valid clock domain found ;
; mbus_addr2_i[24] ; No valid clock domain found ;
; mbus_addr3_i[24] ; No valid clock domain found ;
; mbus_addr0_i[24] ; No valid clock domain found ;
; mbus_addr1_i[24] ; No valid clock domain found ;
; mbus_addr2_i[25] ; No valid clock domain found ;
; mbus_addr3_i[25] ; No valid clock domain found ;
; mbus_addr0_i[25] ; No valid clock domain found ;
; mbus_addr1_i[25] ; No valid clock domain found ;
; mbus_addr2_i[26] ; No valid clock domain found ;
; mbus_addr3_i[26] ; No valid clock domain found ;
; mbus_addr0_i[26] ; No valid clock domain found ;
; mbus_addr1_i[26] ; No valid clock domain found ;
; mbus_addr2_i[27] ; No valid clock domain found ;
; mbus_addr3_i[27] ; No valid clock domain found ;
; mbus_addr0_i[27] ; No valid clock domain found ;
; mbus_addr1_i[27] ; No valid clock domain found ;
; mbus_addr2_i[28] ; No valid clock domain found ;
; mbus_addr3_i[28] ; No valid clock domain found ;
; mbus_addr0_i[28] ; No valid clock domain found ;
; mbus_addr1_i[28] ; No valid clock domain found ;
; mbus_addr2_i[29] ; No valid clock domain found ;
; mbus_addr3_i[29] ; No valid clock domain found ;
; mbus_addr0_i[29] ; No valid clock domain found ;
; mbus_addr1_i[29] ; No valid clock domain found ;
; mbus_addr2_i[30] ; No valid clock domain found ;
; mbus_addr3_i[30] ; No valid clock domain found ;
; mbus_addr0_i[30] ; No valid clock domain found ;
; mbus_addr1_i[30] ; No valid clock domain found ;
; mbus_addr2_i[31] ; No valid clock domain found ;
; mbus_addr3_i[31] ; No valid clock domain found ;
; mbus_addr0_i[31] ; No valid clock domain found ;
; mbus_addr1_i[31] ; No valid clock domain found ;
+------------------+-----------------------------+


+-------------------------------------------------------------------------+
; Operating Conditions Used                                               ;
+---------------------------------------------+---------------------------+
; Setting                                     ; Value                     ;
+---------------------------------------------+---------------------------+
; Device power characteristics                ; Typical                   ;
;                                             ;                           ;
; Voltages                                    ;                           ;
;     VCCINT                                  ; 1.20 V                    ;
;     VCCA                                    ; 2.50 V                    ;
;     VCCD_PLL                                ; 1.20 V                    ;
;     VCC_CLKIN                               ; 2.50 V                    ;
;     VCCA_GXB                                ; 0.00 V                    ;
;     VCCH_GXB                                ; 2.50 V                    ;
;     VCCL_GXB                                ; 0.00 V                    ;
;     2.5 V I/O Standard                      ; 2.5 V                     ;
;                                             ;                           ;
; Auto computed junction temperature          ; 26.4 degrees Celsius      ;
;     Ambient temperature                     ; 25.0 degrees Celsius      ;
;     Junction-to-Case thermal resistance     ; 4.40 degrees Celsius/Watt ;
;     Case-to-Heat Sink thermal resistance    ; 0.10 degrees Celsius/Watt ;
;     Heat Sink-to-Ambient thermal resistance ; 3.40 degrees Celsius/Watt ;
;                                             ;                           ;
; Board model used                            ; None                      ;
+---------------------------------------------+---------------------------+


+----------------------------------------------------------------------------------------------------------------------------------------------+
; Thermal Power Dissipation by Block                                                                                                           ;
+------------+------------+---------------------+-----------------------------+--------------------------------+-------------------------------+
; Block Name ; Block Type ; Total Thermal Power ; Block Thermal Dynamic Power ; Block Thermal Static Power (1) ; Routing Thermal Dynamic Power ;
+------------+------------+---------------------+-----------------------------+--------------------------------+-------------------------------+
(1) The "Thermal Power Dissipation by Block" Table has been hidden. To show this table, please select the "Write power dissipation by block to report file" option under "PowerPlay Power Analyzer Settings".


+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Thermal Power Dissipation by Block Type                                                                                                                                                                            ;
+---------------------+-----------------------------------+-----------------------------+--------------------------------+-------------------------------+-----------------------------------------------------------+
; Block Type          ; Total Thermal Power by Block Type ; Block Thermal Dynamic Power ; Block Thermal Static Power (1) ; Routing Thermal Dynamic Power ; Block Average Toggle Rate (millions of transitions / sec) ;
+---------------------+-----------------------------------+-----------------------------+--------------------------------+-------------------------------+-----------------------------------------------------------+
; Combinational cell  ; 0.00 mW                           ; 0.00 mW                     ; --                             ; 0.00 mW                       ;    0.000                                                  ;
; Clock control block ; 0.00 mW                           ; 0.00 mW                     ; --                             ; 0.00 mW                       ;    0.000                                                  ;
; Register cell       ; 0.00 mW                           ; 0.00 mW                     ; --                             ; 0.00 mW                       ;    0.000                                                  ;
; I/O                 ; 54.26 mW                          ; 0.00 mW                     ; 54.26 mW                       ; 0.00 mW                       ;    0.000                                                  ;
+---------------------+-----------------------------------+-----------------------------+--------------------------------+-------------------------------+-----------------------------------------------------------+
(1) The "Block Thermal Static Power" for all block types except Pins and the Voltage Regulator, if one exists, is part of the "Core Static Thermal Power Dissipation" value found on the PowerPlay Power Analyzer-->Summary report panel. The "Core Static Thermal Power Dissipation" also contains the thermal static power dissipated by the routing.


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Thermal Power Dissipation by Hierarchy                                                                                                                                                                                                                                                                            ;
+------------------------------------------------------------+--------------------------------------+---------------------------------+-----------------------------------+-----------------------------------+-----------------------------------------------------------------------------------------------------+
; Compilation Hierarchy Node                                 ; Total Thermal Power by Hierarchy (1) ; Block Thermal Dynamic Power (1) ; Block Thermal Static Power (1)(2) ; Routing Thermal Dynamic Power (1) ; Full Hierarchy Name                                                                                 ;
+------------------------------------------------------------+--------------------------------------+---------------------------------+-----------------------------------+-----------------------------------+-----------------------------------------------------------------------------------------------------+
; |mesi_isc                                                  ; 54.26 mW (54.26 mW)                  ; 0.00 mW (0.00 mW)               ; 54.26 mW (54.26 mW)               ; 0.00 mW (0.00 mW)                 ; |mesi_isc                                                                                           ;
;     |hard_block:auto_generated_inst                        ; 0.00 mW (0.00 mW)                    ; 0.00 mW (0.00 mW)               ; --                                ; 0.00 mW (0.00 mW)                 ; |mesi_isc|hard_block:auto_generated_inst                                                            ;
;     |mesi_isc_breq_fifos:mesi_isc_breq_fifos               ; 0.00 mW (0.00 mW)                    ; 0.00 mW (0.00 mW)               ; --                                ; 0.00 mW (0.00 mW)                 ; |mesi_isc|mesi_isc_breq_fifos:mesi_isc_breq_fifos                                                   ;
;         |mesi_isc_basic_fifo:fifo_0                        ; 0.00 mW (0.00 mW)                    ; 0.00 mW (0.00 mW)               ; --                                ; 0.00 mW (0.00 mW)                 ; |mesi_isc|mesi_isc_breq_fifos:mesi_isc_breq_fifos|mesi_isc_basic_fifo:fifo_0                        ;
;         |mesi_isc_basic_fifo:fifo_1                        ; 0.00 mW (0.00 mW)                    ; 0.00 mW (0.00 mW)               ; --                                ; 0.00 mW (0.00 mW)                 ; |mesi_isc|mesi_isc_breq_fifos:mesi_isc_breq_fifos|mesi_isc_basic_fifo:fifo_1                        ;
;         |mesi_isc_basic_fifo:fifo_2                        ; 0.00 mW (0.00 mW)                    ; 0.00 mW (0.00 mW)               ; --                                ; 0.00 mW (0.00 mW)                 ; |mesi_isc|mesi_isc_breq_fifos:mesi_isc_breq_fifos|mesi_isc_basic_fifo:fifo_2                        ;
;         |mesi_isc_basic_fifo:fifo_3                        ; 0.00 mW (0.00 mW)                    ; 0.00 mW (0.00 mW)               ; --                                ; 0.00 mW (0.00 mW)                 ; |mesi_isc|mesi_isc_breq_fifos:mesi_isc_breq_fifos|mesi_isc_basic_fifo:fifo_3                        ;
;         |mesi_isc_breq_fifos_cntl:mesi_isc_breq_fifos_cntl ; 0.00 mW (0.00 mW)                    ; 0.00 mW (0.00 mW)               ; --                                ; 0.00 mW (0.00 mW)                 ; |mesi_isc|mesi_isc_breq_fifos:mesi_isc_breq_fifos|mesi_isc_breq_fifos_cntl:mesi_isc_breq_fifos_cntl ;
;     |mesi_isc_broad:mesi_isc_broad                         ; 0.00 mW (0.00 mW)                    ; 0.00 mW (0.00 mW)               ; --                                ; 0.00 mW (0.00 mW)                 ; |mesi_isc|mesi_isc_broad:mesi_isc_broad                                                             ;
;         |mesi_isc_basic_fifo:broad_fifo                    ; 0.00 mW (0.00 mW)                    ; 0.00 mW (0.00 mW)               ; --                                ; 0.00 mW (0.00 mW)                 ; |mesi_isc|mesi_isc_broad:mesi_isc_broad|mesi_isc_basic_fifo:broad_fifo                              ;
;         |mesi_isc_broad_cntl:mesi_isc_broad_cntl           ; 0.00 mW (0.00 mW)                    ; 0.00 mW (0.00 mW)               ; --                                ; 0.00 mW (0.00 mW)                 ; |mesi_isc|mesi_isc_broad:mesi_isc_broad|mesi_isc_broad_cntl:mesi_isc_broad_cntl                     ;
+------------------------------------------------------------+--------------------------------------+---------------------------------+-----------------------------------+-----------------------------------+-----------------------------------------------------------------------------------------------------+
(1) Value in parentheses is the power consumed at that level of hierarchy. Value not in parentheses is the power consumed at that level of hierarchy plus the power consumed by all levels of hierarchy below it.

(2) The "Block Thermal Static Power" for all levels of hierarchy except the top-level hierarchy is part of the "Core Static Thermal Power Dissipation" value found on the PowerPlay Power Analyzer-->Summary report panel. The "Core Static Thermal Power Dissipation" also contains the thermal static power dissipated by the routing.


+--------------------------------------------------------------------+
; Core Dynamic Thermal Power Dissipation by Clock Domain             ;
+-----------------+-----------------------+--------------------------+
; Clock Domain    ; Clock Frequency (MHz) ; Total Core Dynamic Power ;
+-----------------+-----------------------+--------------------------+
; No clock domain ; 0.00                  ; 0.00                     ;
+-----------------+-----------------------+--------------------------+


+------------------------------------------------------------------------------------------------------------------------------------+
; Current Drawn from Voltage Supplies Summary                                                                                        ;
+----------------+-------------------------+---------------------------+--------------------------+----------------------------------+
; Voltage Supply ; Total Current Drawn (1) ; Dynamic Current Drawn (1) ; Static Current Drawn (1) ; Minimum Power Supply Current (2) ;
+----------------+-------------------------+---------------------------+--------------------------+----------------------------------+
; VCCINT         ; 63.36 mA                ; 0.00 mA                   ; 63.36 mA                 ; 63.36 mA                         ;
; VCCIO          ; 3.38 mA                 ; 0.00 mA                   ; 3.38 mA                  ; 3.38 mA                          ;
; VCCA           ; 35.06 mA                ; 0.00 mA                   ; 35.06 mA                 ; 35.06 mA                         ;
; VCCD_PLL       ; 5.62 mA                 ; 0.00 mA                   ; 5.62 mA                  ; 5.62 mA                          ;
; VCC_CLKIN      ; 0.00 mA                 ; 0.00 mA                   ; 0.00 mA                  ; 0.00 mA                          ;
; VCCA_GXB       ; 0.00 mA                 ; 0.00 mA                   ; 0.00 mA                  ; 0.00 mA                          ;
; VCCH_GXB       ; 0.00 mA                 ; 0.00 mA                   ; 0.00 mA                  ; 0.00 mA                          ;
; VCCL_GXB       ; 0.00 mA                 ; 0.00 mA                   ; 0.00 mA                  ; 0.00 mA                          ;
+----------------+-------------------------+---------------------------+--------------------------+----------------------------------+
(1) Currents reported in columns "Total Current Drawn", "Dynamic Current Drawn", and "Static Current Drawn" are sufficient for user operation of the device.  
(2) Currents reported in column "Minimum Power Supply Current" are sufficient for power-up, configuration, and user operation of the device.


+-----------------------------------------------------------------------------------------------+
; VCCIO Supply Current Drawn by I/O Bank                                                        ;
+----------+---------------+---------------------+-----------------------+----------------------+
; I/O Bank ; VCCIO Voltage ; Total Current Drawn ; Dynamic Current Drawn ; Static Current Drawn ;
+----------+---------------+---------------------+-----------------------+----------------------+
; QL1      ; --            ; --                  ; --                    ; --                   ;
; QL0      ; --            ; --                  ; --                    ; --                   ;
; 3        ; 2.5V          ; 0.45 mA             ; 0.00 mA               ; 0.45 mA              ;
; 3B       ; --            ; --                  ; --                    ; --                   ;
; 3A       ; --            ; --                  ; --                    ; --                   ;
; 4        ; 2.5V          ; 0.52 mA             ; 0.00 mA               ; 0.52 mA              ;
; 5        ; 2.5V          ; 0.48 mA             ; 0.00 mA               ; 0.48 mA              ;
; 6        ; 2.5V          ; 0.52 mA             ; 0.00 mA               ; 0.52 mA              ;
; 7        ; 2.5V          ; 0.53 mA             ; 0.00 mA               ; 0.53 mA              ;
; 8A       ; --            ; --                  ; --                    ; --                   ;
; 8        ; 2.5V          ; 0.48 mA             ; 0.00 mA               ; 0.48 mA              ;
; 8B       ; --            ; --                  ; --                    ; --                   ;
; 9        ; 2.5V          ; 0.39 mA             ; 0.00 mA               ; 0.39 mA              ;
+----------+---------------+---------------------+-----------------------+----------------------+


+-----------------------------------------------------------------------------------------------------------------------------------+
; VCCIO Supply Current Drawn by Voltage                                                                                             ;
+---------------+-------------------------+---------------------------+--------------------------+----------------------------------+
; VCCIO Voltage ; Total Current Drawn (1) ; Dynamic Current Drawn (1) ; Static Current Drawn (1) ; Minimum Power Supply Current (2) ;
+---------------+-------------------------+---------------------------+--------------------------+----------------------------------+
; 2.5V          ; 3.38 mA                 ; 0.00 mA                   ; 3.38 mA                  ; 3.38 mA                          ;
+---------------+-------------------------+---------------------------+--------------------------+----------------------------------+
(1) Currents reported in columns "Total Current Drawn", "Dynamic Current Drawn", and "Static Current Drawn" are sufficient for user operation of the device.  
(2) Currents reported in column "Minimum Power Supply Current" are sufficient for power-up, configuration, and user operation of the device.


+----------------------------------------------------------------------------------------------------------------------------------------------------+
; Confidence Metric Details                                                                                                                          ;
+----------------------------------------------------------------------------------------+--------------+-------------+--------------+---------------+
; Data Source                                                                            ; Total        ; Pin         ; Registered   ; Combinational ;
+----------------------------------------------------------------------------------------+--------------+-------------+--------------+---------------+
; Simulation (from file)                                                                 ;              ;             ;              ;               ;
;     -- Number of signals with Toggle Rate from Simulation                              ; 0 (0.0%)     ; 0 (0.0%)    ; 0 (0.0%)     ; 0 (0.0%)      ;
;     -- Number of signals with Static Probability from Simulation                       ; 0 (0.0%)     ; 0 (0.0%)    ; 0 (0.0%)     ; 0 (0.0%)      ;
;                                                                                        ;              ;             ;              ;               ;
; Node, entity or clock assignment                                                       ;              ;             ;              ;               ;
;     -- Number of signals with Toggle Rate from Node, entity or clock assignment        ; 0 (0.0%)     ; 0 (0.0%)    ; 0 (0.0%)     ; 0 (0.0%)      ;
;     -- Number of signals with Static Probability from Node, entity or clock assignment ; 0 (0.0%)     ; 0 (0.0%)    ; 0 (0.0%)     ; 0 (0.0%)      ;
;                                                                                        ;              ;             ;              ;               ;
; Vectorless estimation                                                                  ;              ;             ;              ;               ;
;     -- Number of signals with Toggle Rate from Vectorless estimation                   ; 1633 (91.7%) ; 51 (25.6%)  ; 636 (100.0%) ; 946 (100.0%)  ;
;     -- Number of signals with Zero toggle rate, from Vectorless estimation             ; 404 (22.7%)  ; 2 (1.0%)    ; 8 (1.3%)     ; 394 (41.6%)   ;
;     -- Number of signals with Static Probability from Vectorless estimation            ; 1633 (91.7%) ; 51 (25.6%)  ; 636 (100.0%) ; 946 (100.0%)  ;
;                                                                                        ;              ;             ;              ;               ;
; Default assignment                                                                     ;              ;             ;              ;               ;
;     -- Number of signals with Toggle Rate from Default assignment                      ; 0 (0.0%)     ; 0 (0.0%)    ; 0 (0.0%)     ; 0 (0.0%)      ;
;     -- Number of signals with Static Probability from Default assignment               ; 148 (8.3%)   ; 148 (74.4%) ; 0 (0.0%)     ; 0 (0.0%)      ;
;                                                                                        ;              ;             ;              ;               ;
; Assumed 0                                                                              ;              ;             ;              ;               ;
;     -- Number of signals with Toggle Rate assumed 0                                    ; 148 (8.3%)   ; 148 (74.4%) ; 0 (0.0%)     ; 0 (0.0%)      ;
+----------------------------------------------------------------------------------------+--------------+-------------+--------------+---------------+


+---------------------------------------------------------------------------------------------------------------------------------------------+
; Signal Activities                                                                                                                           ;
+--------+------+---------------------------------------------+-------------------------+--------------------+--------------------------------+
; Signal ; Type ; Toggle Rate (millions of transitions / sec) ; Toggle Rate Data Source ; Static Probability ; Static Probability Data Source ;
+--------+------+---------------------------------------------+-------------------------+--------------------+--------------------------------+
(1) The "Signal Activity" Table has been hidden. To show this table, please select the "Write signal activities to report file" option under "PowerPlay Power Analyzer Settings".


+-----------------------------------+
; PowerPlay Power Analyzer Messages ;
+-----------------------------------+
Info: *******************************************************************
Info: Running Quartus II 32-bit PowerPlay Power Analyzer
    Info: Version 12.0 Build 263 08/02/2012 Service Pack 2 SJ Web Edition
    Info: Processing started: Sun Dec 23 11:48:46 2012
Info: Command: quartus_pow --read_settings_files=on --write_settings_files=off mesi_isc -c mesi_isc
Info (21076): High junction temperature operating condition is not set. Assuming a default value of '85'.
Info (21076): Low junction temperature operating condition is not set. Assuming a default value of '0'.
Critical Warning (332012): Synopsys Design Constraints File file not found: 'mesi_isc.sdc'. A Synopsys Design Constraints File is required by the TimeQuest Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design.
Warning (332060): Node: clk was determined to be a clock but was found without an associated clock assignment.
Warning (332068): No clocks defined in design.
Info (332143): No user constrained clock uncertainty found in the design. Calling "derive_clock_uncertainty"
Info (332154): The derive_clock_uncertainty command did not apply clock uncertainty to any clock-to-clock transfers.
Info (223000): Starting Vectorless Power Activity Estimation
Warning (222013): Relative toggle rates could not be calculated because no clock domain could be identified for some nodes
Info (223001): Completed Vectorless Power Activity Estimation
Info (218000): Using Advanced I/O Power to simulate I/O buffers with the specified board trace model
Warning (215044): No board thermal model was selected.  Analyzing without board thermal modeling.
Info (215049): Average toggle rate for this design is 0.000 millions of transitions / sec
Info (215031): Total thermal power estimate for the design is 178.89 mW
Info: Quartus II 32-bit PowerPlay Power Analyzer was successful. 0 errors, 5 warnings
    Info: Peak virtual memory: 428 megabytes
    Info: Processing ended: Sun Dec 23 11:48:56 2012
    Info: Elapsed time: 00:00:10
    Info: Total CPU time (on all processors): 00:00:10


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