<?xml version="1.0" encoding="UTF-8"?>
<DiamondModule name="dcm" module="dcm" VendorName="Lattice Semiconductor Corporation" generator="IPexpress" date="2017 10 04 18:09:56.525" version="5.8" type="Module" synthesis="synplify" source_format="Verilog HDL">
  <Package>
		<File name="dcm.lpc" type="lpc" modified="2017 10 04 18:09:55.818"/>
		<File name="dcm.v" type="top_level_verilog" modified="2017 10 04 18:09:55.869"/>
		<File name="dcm_tmpl.v" type="template_verilog" modified="2017 10 04 18:09:55.871"/>
  </Package>
</DiamondModule>
