BLOCK RESETPATHS ;
BLOCK ASYNCPATHS ;
## UPDATED FleaFPGA_2v4 18092013 0548PM
## IOBUF USER PUSHBUTTONS;
IOBUF PORT "n_pb1" PULLMODE=UP IO_TYPE=LVCMOS33 ;
IOBUF PORT "n_pb2" PULLMODE=UP IO_TYPE=LVCMOS33 ;
LOCATE COMP "n_pb1" SITE "43" ;
LOCATE COMP "n_pb2" SITE "44" ;
## IOBUF USER LEDS;
IOBUF PORT "n_led1" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "n_led2" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "n_led3" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "n_led4" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
LOCATE COMP "n_led1" SITE "45" ;
LOCATE COMP "n_led2" SITE "47" ;
LOCATE COMP "n_led3" SITE "48" ;
LOCATE COMP "n_led4" SITE "49" ;
## IOBUF USB HOST; ## USB RX pin moved to XO2 pin 89 in PCB rev 2v4!
IOBUF PORT "host_rx_i" PULLMODE=UP IO_TYPE=LVCMOS33 ;
IOBUF PORT "host_tx_o" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "host_cs" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "host_spi" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "host_reset" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "host_sck" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
IOBUF PORT "host_sdi" PULLMODE=UP IO_TYPE=LVCMOS33 CLAMP=OFF OPENDRAIN=OFF ;
IOBUF PORT "host_sdo" PULLMODE=NONE IO_TYPE=LVCMOS33 CLAMP=OFF ;
LOCATE COMP "host_sdi" SITE "99" ;
LOCATE COMP "host_sdo" SITE "98" ;
IOBUF PORT "host_nInt" PULLMODE=NONE IO_TYPE=LVCMOS33 CLAMP=OFF ;
LOCATE COMP "host_nInt" SITE "104" ;
LOCATE COMP "host_sck" SITE "100" ;
LOCATE COMP "host_tx_o" SITE "89" ;
LOCATE COMP "host_rx_i" SITE "107" ;
LOCATE COMP "host_cs" SITE "103" ;
LOCATE COMP "host_spi" SITE "106" ;
LOCATE COMP "host_reset" SITE "105" ;
## IOBUF USB SLAVE; ## Swapped in PCB rev 2v4!!!
IOBUF PORT "slave_rx_i" PULLMODE=UP IO_TYPE=LVCMOS33 ;
IOBUF PORT "slave_tx_o" PULLMODE=NONE IO_TYPE=LVCMOS33 ;
LOCATE COMP "slave_rx_i" SITE "78" ;
LOCATE COMP "slave_tx_o" SITE "77" ;
## IOBUF FPGA CLOCK AND RESET; ##Sys_clock moved to XO2 pin 3 in PCB rev 2v4
IOBUF PORT "sys_reset" IO_TYPE=LVCMOS33 PULLMODE=NONE ;
IOBUF PORT "sys_clock" IO_TYPE=LVCMOS33 ;
FREQUENCY PORT "sys_clock" 50.000000 MHz ;
LOCATE COMP "sys_reset" SITE "91" ;
LOCATE COMP "sys_clock" SITE "3" ;
## IOBUF AUDIO OUT;
IOBUF PORT "Audio_l" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Audio_r" IO_TYPE=LVCMOS33 ;
LOCATE COMP "Audio_l" SITE "97" ;
LOCATE COMP "Audio_r" SITE "96" ;
## IOBUF PS/2 KEYBOARD AND MOUSE;
IOBUF PORT "PS2_clk1" IO_TYPE=LVCMOS33 PULLMODE=UP ;
IOBUF PORT "PS2_data1" IO_TYPE=LVCMOS33 PULLMODE=UP ;
IOBUF PORT "PS2_clk2" IO_TYPE=LVCMOS33 PULLMODE=UP ;
IOBUF PORT "PS2_data2" IO_TYPE=LVCMOS33 PULLMODE=UP ;
LOCATE COMP "PS2_clk1" SITE "95" ;
LOCATE COMP "PS2_data1" SITE "94" ;
LOCATE COMP "PS2_clk2" SITE "92" ;
LOCATE COMP "PS2_data2" SITE "93" ;
## IOBUF VGA OUTPUT; ## Extended to 12bit-color out in rev 2v4!!!
IOBUF PORT "vga_vs" IO_TYPE=LVCMOS33 PULLMODE=NONE ;
IOBUF PORT "vga_hs" IO_TYPE=LVCMOS33 PULLMODE=NONE ;
IOBUF PORT "vga_red[3]" IO_TYPE=LVCMOS33 PULLMODE=NONE ;
IOBUF PORT "vga_red[2]" IO_TYPE=LVCMOS33 PULLMODE=NONE ;
IOBUF PORT "vga_red[1]" IO_TYPE=LVCMOS33 PULLMODE=NONE ;
IOBUF PORT "vga_red[0]" IO_TYPE=LVCMOS33 PULLMODE=NONE ;
IOBUF PORT "vga_green[3]" IO_TYPE=LVCMOS33 PULLMODE=NONE ;
IOBUF PORT "vga_green[2]" IO_TYPE=LVCMOS33 PULLMODE=NONE ;
IOBUF PORT "vga_green[1]" IO_TYPE=LVCMOS33 PULLMODE=NONE ;
IOBUF PORT "vga_green[0]" IO_TYPE=LVCMOS33 PULLMODE=NONE ;
IOBUF PORT "vga_blue[3]" IO_TYPE=LVCMOS33 PULLMODE=NONE ;
IOBUF PORT "vga_blue[2]" IO_TYPE=LVCMOS33 PULLMODE=NONE ;
IOBUF PORT "vga_blue[1]" IO_TYPE=LVCMOS33 PULLMODE=NONE ;
IOBUF PORT "vga_blue[0]" IO_TYPE=LVCMOS33 PULLMODE=NONE ;
LOCATE COMP "vga_vs" SITE "87" ;
LOCATE COMP "vga_hs" SITE "109" ;
LOCATE COMP "vga_red[3]" SITE "112" ;
LOCATE COMP "vga_red[2]" SITE "120" ;
LOCATE COMP "vga_red[1]" SITE "115" ;
LOCATE COMP "vga_red[0]" SITE "125" ;
LOCATE COMP "vga_green[3]" SITE "111" ;
LOCATE COMP "vga_green[2]" SITE "119" ;
LOCATE COMP "vga_green[1]" SITE "114" ;
LOCATE COMP "vga_green[0]" SITE "122" ;
LOCATE COMP "vga_blue[3]" SITE "110" ;
LOCATE COMP "vga_blue[2]" SITE "117" ;
LOCATE COMP "vga_blue[1]" SITE "113" ;
LOCATE COMP "vga_blue[0]" SITE "121" ;
## IOBUF GPIO HEADER;
IOBUF PORT "GPIO[18]" IO_TYPE=LVCMOS33 PULLMODE=UP ;
IOBUF PORT "GPIO[17]" IO_TYPE=LVCMOS33 PULLMODE=UP ;
IOBUF PORT "GPIO[16]" IO_TYPE=LVCMOS33 PULLMODE=UP ;
IOBUF PORT "GPIO[15]" IO_TYPE=LVCMOS33 PULLMODE=UP ;
IOBUF PORT "GPIO[14]" IO_TYPE=LVCMOS33 PULLMODE=UP ;
IOBUF PORT "GPIO[13]" IO_TYPE=LVCMOS33 PULLMODE=UP ;
IOBUF PORT "GPIO[12]" IO_TYPE=LVCMOS33 PULLMODE=UP ;
IOBUF PORT "GPIO[11]" IO_TYPE=LVCMOS33 PULLMODE=UP ;
IOBUF PORT "GPIO[10]" IO_TYPE=LVCMOS33 PULLMODE=UP ;
IOBUF PORT "GPIO[9]" IO_TYPE=LVCMOS33 PULLMODE=UP ;
IOBUF PORT "GPIO[8]" IO_TYPE=LVCMOS33 PULLMODE=UP ;
IOBUF PORT "GPIO[7]" IO_TYPE=LVCMOS33 PULLMODE=UP ;
IOBUF PORT "GPIO[6]" IO_TYPE=LVCMOS33 PULLMODE=UP ;
IOBUF PORT "GPIO[5]" IO_TYPE=LVCMOS33 PULLMODE=UP ;
IOBUF PORT "GPIO[4]" IO_TYPE=LVCMOS33 PULLMODE=UP ;
IOBUF PORT "GPIO[3]" IO_TYPE=LVCMOS33 PULLMODE=UP ;
IOBUF PORT "GPIO[2]" IO_TYPE=LVCMOS33 PULLMODE=UP ;
IOBUF PORT "GPIO[1]" IO_TYPE=LVCMOS33 PULLMODE=UP ;
LOCATE COMP "GPIO[1]" SITE "70" ;
LOCATE COMP "GPIO[2]" SITE "68" ;
LOCATE COMP "GPIO[3]" SITE "65" ;
LOCATE COMP "GPIO[4]" SITE "61" ;
LOCATE COMP "GPIO[5]" SITE "62" ;
LOCATE COMP "GPIO[6]" SITE "58" ;
LOCATE COMP "GPIO[7]" SITE "56" ;
LOCATE COMP "GPIO[8]" SITE "54" ;
LOCATE COMP "GPIO[9]" SITE "50" ;
LOCATE COMP "GPIO[10]" SITE "71" ;
LOCATE COMP "GPIO[11]" SITE "69" ;
LOCATE COMP "GPIO[12]" SITE "67" ;
LOCATE COMP "GPIO[13]" SITE "63" ;
LOCATE COMP "GPIO[14]" SITE "60" ;
LOCATE COMP "GPIO[15]" SITE "59" ;
LOCATE COMP "GPIO[16]" SITE "57" ;
LOCATE COMP "GPIO[17]" SITE "55" ;
LOCATE COMP "GPIO[18]" SITE "52" ;
## IOBUF SDRAM; ## DQML added, Dram_clk and DRAM_A1 pins moved in PCB 2v4!
IOBUF PORT "Dram_Clk" IO_TYPE=LVCMOS33 PULLMODE=DOWN DRIVE=12 SLEWRATE=FAST ;
IOBUF PORT "Dram_n_Ras" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_n_Cas" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_n_We" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_n_cs" IO_TYPE=LVCMOS33 PULLMODE=UP ;
IOBUF PORT "Dram_DQMH" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_DQML" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_BA[0]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_BA[1]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Addr[12]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Addr[11]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Addr[10]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Addr[9]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Addr[8]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Addr[7]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Addr[6]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Addr[5]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Addr[4]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Addr[3]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Addr[2]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Addr[1]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Addr[0]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Data[15]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Data[14]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Data[13]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Data[12]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Data[11]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Data[10]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Data[9]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Data[8]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Data[7]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Data[6]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Data[5]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Data[4]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Data[3]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Data[2]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Data[1]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Data[0]" IO_TYPE=LVCMOS33 ;
LOCATE COMP "Dram_Clk" SITE "24" ;
LOCATE COMP "Dram_n_Ras" SITE "11" ;
LOCATE COMP "Dram_n_Cas" SITE "12" ;
LOCATE COMP "Dram_n_We" SITE "141" ;
LOCATE COMP "Dram_BA[0]" SITE "10" ;
LOCATE COMP "Dram_BA[1]" SITE "9" ;
LOCATE COMP "Dram_n_cs" SITE "142" ;
LOCATE COMP "Dram_DQMH" SITE "25" ;
LOCATE COMP "Dram_DQML" SITE "4" ;
LOCATE COMP "Dram_Data[15]" SITE "35" ;
LOCATE COMP "Dram_Data[14]" SITE "34" ;
LOCATE COMP "Dram_Data[13]" SITE "33" ;
LOCATE COMP "Dram_Data[12]" SITE "32" ;
LOCATE COMP "Dram_Data[11]" SITE "31" ;
LOCATE COMP "Dram_Data[10]" SITE "28" ;
LOCATE COMP "Dram_Data[9]" SITE "27" ;
LOCATE COMP "Dram_Data[8]" SITE "26" ;
LOCATE COMP "Dram_Data[7]" SITE "140" ;
LOCATE COMP "Dram_Data[6]" SITE "139" ;
LOCATE COMP "Dram_Data[5]" SITE "138" ;
LOCATE COMP "Dram_Data[4]" SITE "133" ;
LOCATE COMP "Dram_Data[3]" SITE "132" ;
LOCATE COMP "Dram_Data[2]" SITE "128" ;
LOCATE COMP "Dram_Data[1]" SITE "127" ;
LOCATE COMP "Dram_Data[0]" SITE "126" ;
LOCATE COMP "Dram_Addr[12]" SITE "23" ;
LOCATE COMP "Dram_Addr[11]" SITE "22" ;
LOCATE COMP "Dram_Addr[10]" SITE "143" ;
LOCATE COMP "Dram_Addr[9]" SITE "13" ;
LOCATE COMP "Dram_Addr[8]" SITE "21" ;
LOCATE COMP "Dram_Addr[7]" SITE "20" ;
LOCATE COMP "Dram_Addr[6]" SITE "14" ;
LOCATE COMP "Dram_Addr[5]" SITE "19" ;
LOCATE COMP "Dram_Addr[4]" SITE "15" ;
LOCATE COMP "Dram_Addr[3]" SITE "2" ;
LOCATE COMP "Dram_Addr[2]" SITE "1" ;
LOCATE COMP "Dram_Addr[1]" SITE "5" ;
LOCATE COMP "Dram_Addr[0]" SITE "6" ;
## IOBUF SD/MMC PORT;
IOBUF PORT "mmc_miso" IO_TYPE=LVCMOS33 PULLMODE=NONE ;
IOBUF PORT "mmc_dat1" IO_TYPE=LVCMOS33 PULLMODE=NONE ;
IOBUF PORT "mmc_dat2" IO_TYPE=LVCMOS33 PULLMODE=NONE ;
IOBUF PORT "mmc_n_cs" IO_TYPE=LVCMOS33 PULLMODE=NONE ;
IOBUF PORT "mmc_mosi" IO_TYPE=LVCMOS33 PULLMODE=NONE ;
IOBUF PORT "mmc_clk" IO_TYPE=LVCMOS33 ;
LOCATE COMP "mmc_miso" SITE "42" ;
LOCATE COMP "mmc_dat1" SITE "41" ;
LOCATE COMP "mmc_dat2" SITE "40" ;
LOCATE COMP "mmc_n_cs" SITE "39" ;
LOCATE COMP "mmc_mosi" SITE "38" ;
LOCATE COMP "mmc_clk" SITE "17" ;
## IOBUF ALLPORTS ;
IOBUF PORT "Dram_BA[1]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_BA[0]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Addr[12]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Addr[11]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Addr[10]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Addr[9]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Addr[8]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Addr[7]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Addr[6]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Addr[5]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Addr[4]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Addr[3]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Addr[2]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Addr[1]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "Dram_Addr[0]" IO_TYPE=LVCMOS33 ;
IOBUF PORT "vga_red[3]" IO_TYPE=LVCMOS33 PULLMODE=NONE ;
IOBUF PORT "vga_red[2]" IO_TYPE=LVCMOS33 PULLMODE=NONE ;
IOBUF PORT "vga_red[1]" IO_TYPE=LVCMOS33 PULLMODE=NONE ;
IOBUF PORT "vga_red[0]" IO_TYPE=LVCMOS33 PULLMODE=NONE ;
IOBUF PORT "vga_green[3]" IO_TYPE=LVCMOS33 PULLMODE=NONE ;
IOBUF PORT "vga_green[2]" IO_TYPE=LVCMOS33 PULLMODE=NONE ;
IOBUF PORT "vga_green[1]" IO_TYPE=LVCMOS33 PULLMODE=NONE ;
IOBUF PORT "vga_green[0]" IO_TYPE=LVCMOS33 PULLMODE=NONE ;
IOBUF PORT "vga_blue[3]" IO_TYPE=LVCMOS33 PULLMODE=NONE ;
IOBUF PORT "vga_blue[2]" IO_TYPE=LVCMOS33 PULLMODE=NONE ;
IOBUF PORT "vga_blue[1]" IO_TYPE=LVCMOS33 PULLMODE=NONE ;
IOBUF PORT "vga_blue[0]" IO_TYPE=LVCMOS33 PULLMODE=NONE ;
SYSCONFIG MCCLK_FREQ=2.08 ONE_TIME_PROGRAM=OFF CONFIG_SECURE=OFF ;
TEMPERATURE 85.000 C;
VOLTAGE 1.140 V;
BLOCK PATH FROM CLKNET "sys_inst.clk_cpu" TO CLKNET "sys_inst.clk_sdr" ;
BLOCK PATH FROM CLKNET "sys_inst.clk_sdr" TO CLKNET "sys_inst.clk_cpu" ;
BLOCK PATH FROM CLKNET "sys_inst.clk_cpu" TO CLKNET "sys_inst/CLK29491200" ;
BLOCK PATH FROM CLKNET "sys_inst/CLK29491200" TO CLKNET "sys_inst.clk_cpu" ;
BLOCK PATH FROM CLKNET "sys_inst.clk_25" TO CLKNET "sys_inst.clk_cpu" ;
BLOCK PATH FROM CLKNET "sys_inst.clk_cpu" TO CLKNET "sys_inst.clk_25" ;
BLOCK PATH FROM CLKNET "sys_inst.CLK44100x256" TO CLKNET "sys_inst.clk_cpu" ;
BLOCK PATH FROM CLKNET "sys_inst.clk_cpu" TO CLKNET "sys_inst.CLK44100x256" ;
DEFINE CELL GROUP "GROUP_CPU" "sys_inst/CPUUnit/cpu/REGS/SREG_1_[0]" 
"sys_inst/CPUUnit/cpu/REGS/SREG_1_[1]" 
"sys_inst/CPUUnit/cpu/REGS/SREG_1_[2]" 
"sys_inst/CPUUnit/cpu/REGS/SREG_1_[3]" 
"sys_inst/CPUUnit/cpu/REGS/SREG_1_[4]" 
"sys_inst/CPUUnit/cpu/REGS/SREG_1_[5]" 
"sys_inst/CPUUnit/cpu/REGS/SREG_1_[6]" 
"sys_inst/CPUUnit/cpu/REGS/SREG_1_[7]" 
"sys_inst/CPUUnit/cpu/REGS/SREG_1_[8]" 
"sys_inst/CPUUnit/cpu/REGS/SREG_1_[9]" 
"sys_inst/CPUUnit/cpu/REGS/SREG_1_[10]" 
"sys_inst/CPUUnit/cpu/REGS/SREG_1_[11]" 
"sys_inst/CPUUnit/cpu/REGS/SREG_1_[12]" 
"sys_inst/CPUUnit/cpu/REGS/SREG_1_[13]" 
"sys_inst/CPUUnit/cpu/REGS/SREG_1_[14]" 
"sys_inst/CPUUnit/cpu/REGS/SREG_1_[15]" 
"sys_inst/CPUUnit/cpu/REGS/SP[0]" 
"sys_inst/CPUUnit/cpu/REGS/SP[1]" 
"sys_inst/CPUUnit/cpu/REGS/SP[2]" 
"sys_inst/CPUUnit/cpu/REGS/SP[3]" 
"sys_inst/CPUUnit/cpu/REGS/SP[4]" 
"sys_inst/CPUUnit/cpu/REGS/SP[5]" 
"sys_inst/CPUUnit/cpu/REGS/SP[6]" 
"sys_inst/CPUUnit/cpu/REGS/SP[7]" 
"sys_inst/CPUUnit/cpu/REGS/SP[8]" 
"sys_inst/CPUUnit/cpu/REGS/SP[9]" 
"sys_inst/CPUUnit/cpu/REGS/SP[10]" 
"sys_inst/CPUUnit/cpu/REGS/SP[11]" 
"sys_inst/CPUUnit/cpu/REGS/SP[12]" 
"sys_inst/CPUUnit/cpu/REGS/SP[13]" 
"sys_inst/CPUUnit/cpu/REGS/SP[14]" 
"sys_inst/CPUUnit/cpu/REGS/SP[15]" 
"sys_inst/CPUUnit/cpu/REGS/SI[0]" 
"sys_inst/CPUUnit/cpu/REGS/SI[1]" 
"sys_inst/CPUUnit/cpu/REGS/SI[2]" 
"sys_inst/CPUUnit/cpu/REGS/SI[3]" 
"sys_inst/CPUUnit/cpu/REGS/SI[4]" 
"sys_inst/CPUUnit/cpu/REGS/SI[5]" 
"sys_inst/CPUUnit/cpu/REGS/SI[6]" 
"sys_inst/CPUUnit/cpu/REGS/SI[7]" 
"sys_inst/CPUUnit/cpu/REGS/SI[8]" 
"sys_inst/CPUUnit/cpu/REGS/SI[9]" 
"sys_inst/CPUUnit/cpu/REGS/SI[10]" 
"sys_inst/CPUUnit/cpu/REGS/SI[11]" 
"sys_inst/CPUUnit/cpu/REGS/SI[12]" 
"sys_inst/CPUUnit/cpu/REGS/SI[13]" 
"sys_inst/CPUUnit/cpu/REGS/SI[14]" 
"sys_inst/CPUUnit/cpu/REGS/SI[15]" 
"sys_inst/CPUUnit/cpu/REGS/FLG[0]" 
"sys_inst/CPUUnit/cpu/REGS/FLG[1]" 
"sys_inst/CPUUnit/cpu/REGS/FLG[2]" 
"sys_inst/CPUUnit/cpu/REGS/FLG[3]" 
"sys_inst/CPUUnit/cpu/REGS/FLG[4]" 
"sys_inst/CPUUnit/cpu/REGS/FLG[8]" 
"sys_inst/CPUUnit/cpu/REGS/FLG[5]" 
"sys_inst/CPUUnit/cpu/REGS/FLG[6]" 
"sys_inst/CPUUnit/cpu/REGS/FLG[7]" 
"sys_inst/CPUUnit/cpu/REGS/DX_1[0]" 
"sys_inst/CPUUnit/cpu/REGS/DX_1[1]" 
"sys_inst/CPUUnit/cpu/REGS/DX_1[2]" 
"sys_inst/CPUUnit/cpu/REGS/DX_1[3]" 
"sys_inst/CPUUnit/cpu/REGS/DX_1[4]" 
"sys_inst/CPUUnit/cpu/REGS/DX_1[5]" 
"sys_inst/CPUUnit/cpu/REGS/DX_1[6]" 
"sys_inst/CPUUnit/cpu/REGS/DX_1[7]" 
"sys_inst/CPUUnit/cpu/REGS/DX_1[8]" 
"sys_inst/CPUUnit/cpu/REGS/DX_1[9]" 
"sys_inst/CPUUnit/cpu/REGS/DX_1[10]" 
"sys_inst/CPUUnit/cpu/REGS/DX_1[11]" 
"sys_inst/CPUUnit/cpu/REGS/DX_1[12]" 
"sys_inst/CPUUnit/cpu/REGS/DX_1[13]" 
"sys_inst/CPUUnit/cpu/REGS/DX_1[14]" 
"sys_inst/CPUUnit/cpu/REGS/DX_1[15]" 
"sys_inst/CPUUnit/cpu/REGS/DI[0]" 
"sys_inst/CPUUnit/cpu/REGS/DI[1]" 
"sys_inst/CPUUnit/cpu/REGS/DI[2]" 
"sys_inst/CPUUnit/cpu/REGS/DI[3]" 
"sys_inst/CPUUnit/cpu/REGS/DI[4]" 
"sys_inst/CPUUnit/cpu/REGS/DI[5]" 
"sys_inst/CPUUnit/cpu/REGS/DI[6]" 
"sys_inst/CPUUnit/cpu/REGS/DI[7]" 
"sys_inst/CPUUnit/cpu/REGS/DI[8]" 
"sys_inst/CPUUnit/cpu/REGS/DI[9]" 
"sys_inst/CPUUnit/cpu/REGS/DI[10]" 
"sys_inst/CPUUnit/cpu/REGS/DI[11]" 
"sys_inst/CPUUnit/cpu/REGS/DI[12]" 
"sys_inst/CPUUnit/cpu/REGS/DI[13]" 
"sys_inst/CPUUnit/cpu/REGS/DI[14]" 
"sys_inst/CPUUnit/cpu/REGS/DI[15]" 
"sys_inst/CPUUnit/cpu/REGS/CX[0]" 
"sys_inst/CPUUnit/cpu/REGS/CX[1]" 
"sys_inst/CPUUnit/cpu/REGS/CX[2]" 
"sys_inst/CPUUnit/cpu/REGS/CX[3]" 
"sys_inst/CPUUnit/cpu/REGS/CX[4]" 
"sys_inst/CPUUnit/cpu/REGS/CX[5]" 
"sys_inst/CPUUnit/cpu/REGS/CX[6]" 
"sys_inst/CPUUnit/cpu/REGS/CX[7]" 
"sys_inst/CPUUnit/cpu/REGS/CX[8]" 
"sys_inst/CPUUnit/cpu/REGS/CX[9]" 
"sys_inst/CPUUnit/cpu/REGS/CX[10]" 
"sys_inst/CPUUnit/cpu/REGS/CX[11]" 
"sys_inst/CPUUnit/cpu/REGS/CX[12]" 
"sys_inst/CPUUnit/cpu/REGS/CX[13]" 
"sys_inst/CPUUnit/cpu/REGS/CX[14]" 
"sys_inst/CPUUnit/cpu/REGS/CX[15]" 
"sys_inst/CPUUnit/cpu/REGS/BX_1[0]" 
"sys_inst/CPUUnit/cpu/REGS/BX_1[1]" 
"sys_inst/CPUUnit/cpu/REGS/BX_1[2]" 
"sys_inst/CPUUnit/cpu/REGS/BX_1[3]" 
"sys_inst/CPUUnit/cpu/REGS/BX_1[4]" 
"sys_inst/CPUUnit/cpu/REGS/BX_1[5]" 
"sys_inst/CPUUnit/cpu/REGS/BX_1[6]" 
"sys_inst/CPUUnit/cpu/REGS/BX_1[7]" 
"sys_inst/CPUUnit/cpu/REGS/BX_1[8]" 
"sys_inst/CPUUnit/cpu/REGS/BX_1[9]" 
"sys_inst/CPUUnit/cpu/REGS/BX_1[10]" 
"sys_inst/CPUUnit/cpu/REGS/BX_1[11]" 
"sys_inst/CPUUnit/cpu/REGS/BX_1[12]" 
"sys_inst/CPUUnit/cpu/REGS/BX_1[13]" 
"sys_inst/CPUUnit/cpu/REGS/BX_1[14]" 
"sys_inst/CPUUnit/cpu/REGS/BX_1[15]" 
"sys_inst/CPUUnit/cpu/REGS/BP[0]" 
"sys_inst/CPUUnit/cpu/REGS/BP[1]" 
"sys_inst/CPUUnit/cpu/REGS/BP[2]" 
"sys_inst/CPUUnit/cpu/REGS/BP[3]" 
"sys_inst/CPUUnit/cpu/REGS/BP[4]" 
"sys_inst/CPUUnit/cpu/REGS/BP[5]" 
"sys_inst/CPUUnit/cpu/REGS/BP[6]" 
"sys_inst/CPUUnit/cpu/REGS/BP[7]" 
"sys_inst/CPUUnit/cpu/REGS/BP[8]" 
"sys_inst/CPUUnit/cpu/REGS/BP[9]" 
"sys_inst/CPUUnit/cpu/REGS/BP[10]" 
"sys_inst/CPUUnit/cpu/REGS/BP[11]" 
"sys_inst/CPUUnit/cpu/REGS/BP[12]" 
"sys_inst/CPUUnit/cpu/REGS/BP[13]" 
"sys_inst/CPUUnit/cpu/REGS/BP[14]" 
"sys_inst/CPUUnit/cpu/REGS/BP[15]" 
"sys_inst/CPUUnit/cpu/REGS/AX_1[0]" 
"sys_inst/CPUUnit/cpu/REGS/AX_1[1]" 
"sys_inst/CPUUnit/cpu/REGS/AX_1[2]" 
"sys_inst/CPUUnit/cpu/REGS/AX_1[3]" 
"sys_inst/CPUUnit/cpu/REGS/AX_1[4]" 
"sys_inst/CPUUnit/cpu/REGS/AX_1[5]" 
"sys_inst/CPUUnit/cpu/REGS/AX_1[6]" 
"sys_inst/CPUUnit/cpu/REGS/AX_1[7]" 
"sys_inst/CPUUnit/cpu/REGS/AX_1[8]" 
"sys_inst/CPUUnit/cpu/REGS/AX_1[9]" 
"sys_inst/CPUUnit/cpu/REGS/AX_1[10]" 
"sys_inst/CPUUnit/cpu/REGS/AX_1[11]" 
"sys_inst/CPUUnit/cpu/REGS/AX_1[12]" 
"sys_inst/CPUUnit/cpu/REGS/AX_1[13]" 
"sys_inst/CPUUnit/cpu/REGS/AX_1[14]" 
"sys_inst/CPUUnit/cpu/REGS/AX_1[15]" 
"sys_inst/CPUUnit/cpu/TZF" 
"sys_inst/CPUUnit/cpu/TLF" 
"sys_inst/CPUUnit/cpu/FETCH[5][0]" 
"sys_inst/CPUUnit/cpu/FETCH[5][1]" 
"sys_inst/CPUUnit/cpu/FETCH[5][2]" 
"sys_inst/CPUUnit/cpu/FETCH[0][0]" 
"sys_inst/CPUUnit/cpu/FETCH[0][1]" 
"sys_inst/CPUUnit/cpu/FETCH[5][3]" 
"sys_inst/CPUUnit/cpu/FETCH[5][4]" 
"sys_inst/CPUUnit/cpu/FETCH[5][5]" 
"sys_inst/CPUUnit/cpu/FETCH[5][6]" 
"sys_inst/CPUUnit/cpu/FETCH[5][7]" 
"sys_inst/CPUUnit/cpu/FETCH[0][2]" 
"sys_inst/CPUUnit/cpu/FETCH[0][3]" 
"sys_inst/CPUUnit/cpu/FETCH[0][4]" 
"sys_inst/CPUUnit/cpu/FETCH[0][5]" 
"sys_inst/CPUUnit/cpu/FETCH[0][6]" 
"sys_inst/CPUUnit/cpu/FETCH[0][7]" 
"sys_inst/CPUUnit/cpu/FETCH[4][0]" 
"sys_inst/CPUUnit/cpu/FETCH[4][1]" 
"sys_inst/CPUUnit/cpu/FETCH[4][2]" 
"sys_inst/CPUUnit/cpu/FETCH[4][3]" 
"sys_inst/CPUUnit/cpu/FETCH[4][4]" 
"sys_inst/CPUUnit/cpu/FETCH[4][5]" 
"sys_inst/CPUUnit/cpu/FETCH[4][6]" 
"sys_inst/CPUUnit/cpu/FETCH[4][7]" 
"sys_inst/CPUUnit/cpu/FETCH[1][0]" 
"sys_inst/CPUUnit/cpu/FETCH[1][1]" 
"sys_inst/CPUUnit/cpu/FETCH[1][2]" 
"sys_inst/CPUUnit/cpu/FETCH[1][3]" 
"sys_inst/CPUUnit/cpu/FETCH[1][4]" 
"sys_inst/CPUUnit/cpu/FETCH[1][5]" 
"sys_inst/CPUUnit/cpu/FETCH[1][6]" 
"sys_inst/CPUUnit/cpu/FETCH[1][7]" 
"sys_inst/CPUUnit/cpu/CPUStatus[3]" 
"sys_inst/CPUUnit/cpu/CPUStatus[4]" 
"sys_inst/CPUUnit/cpu/CPUStatus[5]" 
"sys_inst/CPUUnit/cpu/FETCH[3][0]" 
"sys_inst/CPUUnit/cpu/FETCH[3][1]" 
"sys_inst/CPUUnit/cpu/FETCH[3][2]" 
"sys_inst/CPUUnit/cpu/FETCH[3][3]" 
"sys_inst/CPUUnit/cpu/FETCH[3][4]" 
"sys_inst/CPUUnit/cpu/FETCH[3][5]" 
"sys_inst/CPUUnit/cpu/FETCH[3][6]" 
"sys_inst/CPUUnit/cpu/FETCH[3][7]" 
"sys_inst/CPUUnit/cpu/FETCH[2][0]" 
"sys_inst/CPUUnit/cpu/FETCH[2][1]" 
"sys_inst/CPUUnit/cpu/FETCH[2][2]" 
"sys_inst/CPUUnit/cpu/FETCH[2][3]" 
"sys_inst/CPUUnit/cpu/FETCH[2][4]" 
"sys_inst/CPUUnit/cpu/FETCH[2][5]" 
"sys_inst/CPUUnit/cpu/FETCH[2][6]" 
"sys_inst/CPUUnit/cpu/FETCH[2][7]" 
"sys_inst/CPUUnit/cpu/DIVQSGN" 
"sys_inst/CPUUnit/cpu/CRTIP[0]" 
"sys_inst/CPUUnit/cpu/CRTIP[1]" 
"sys_inst/CPUUnit/cpu/CRTIP[2]" 
"sys_inst/CPUUnit/cpu/CRTIP[3]" 
"sys_inst/CPUUnit/cpu/CRTIP[4]" 
"sys_inst/CPUUnit/cpu/CRTIP[5]" 
"sys_inst/CPUUnit/cpu/CRTIP[6]" 
"sys_inst/CPUUnit/cpu/CRTIP[7]" 
"sys_inst/CPUUnit/cpu/CRTIP[8]" 
"sys_inst/CPUUnit/cpu/CRTIP[9]" 
"sys_inst/CPUUnit/cpu/CRTIP[10]" 
"sys_inst/CPUUnit/cpu/CRTIP[11]" 
"sys_inst/CPUUnit/cpu/CRTIP[12]" 
"sys_inst/CPUUnit/cpu/CRTIP[13]" 
"sys_inst/CPUUnit/cpu/CRTIP[14]" 
"sys_inst/CPUUnit/cpu/CRTIP[15]" 
"sys_inst/CPUUnit/cpu/CPUStatus[0]" 
"sys_inst/CPUUnit/cpu/CPUStatus[1]" 
"sys_inst/CPUUnit/cpu/CPUStatus[2]" 
"sys_inst/CPUUnit/cpu/ICODE1[0]" 
"sys_inst/CPUUnit/cpu/ICODE1[1]" 
"sys_inst/CPUUnit/cpu/ICODE1[2]" 
"sys_inst/CPUUnit/cpu/ICODE1[3]" 
"sys_inst/CPUUnit/cpu/ICODE1[4]" 
"sys_inst/CPUUnit/cpu/ICODE1[5]" 
"sys_inst/CPUUnit/cpu/STAGE[0]" 
"sys_inst/CPUUnit/cpu/STAGE[1]" 
"sys_inst/CPUUnit/cpu/STAGE[2]" 
"sys_inst/CPUUnit/cpu/STAGE[3]" 
"sys_inst/CPUUnit/cpu/STAGE[4]" 
"sys_inst/CPUUnit/cpu/STAGE[5]" 
"sys_inst/CPUUnit/cpu/STAGE[6]" 
"sys_inst/CPUUnit/cpu/SRST" 
"sys_inst/CPUUnit/cpu/SINTR" 
"sys_inst/CPUUnit/cpu/SNMI" 
"sys_inst/CPUUnit/cpu/FNMI" 
"sys_inst/CPUUnit/cpu/RDIVEXC" 
"sys_inst/CPUUnit/cpu/CMPS" 
"sys_inst/CPUUnit/cpu/SCAS" 
"sys_inst/CPUUnit/cpu/RCOUT" 
"sys_inst/CPUUnit/cpu/DIVIRQ" 
"sys_inst/CPUUnit/cpu/AAMIRQ" 
"sys_inst/CPUUnit/cpu/REGS/IP[0]" 
"sys_inst/CPUUnit/cpu/REGS/IP[1]" 
"sys_inst/CPUUnit/cpu/REGS/IP[2]" 
"sys_inst/CPUUnit/cpu/REGS/IP[3]" 
"sys_inst/CPUUnit/cpu/REGS/IP[4]" 
"sys_inst/CPUUnit/cpu/REGS/IP[5]" 
"sys_inst/CPUUnit/cpu/REGS/IP[6]" 
"sys_inst/CPUUnit/cpu/REGS/IP[7]" 
"sys_inst/CPUUnit/cpu/REGS/IP[8]" 
"sys_inst/CPUUnit/cpu/REGS/IP[9]" 
"sys_inst/CPUUnit/cpu/REGS/IP[10]" 
"sys_inst/CPUUnit/cpu/REGS/IP[11]" 
"sys_inst/CPUUnit/cpu/REGS/IP[12]" 
"sys_inst/CPUUnit/cpu/REGS/IP[13]" 
"sys_inst/CPUUnit/cpu/REGS/IP[14]" 
"sys_inst/CPUUnit/cpu/REGS/IP[15]" 
"sys_inst/CPUUnit/cpu/REGS/SREG_ram_2" 
"sys_inst/CPUUnit/cpu/REGS/SREG_ram_1" 
"sys_inst/CPUUnit/cpu/REGS/SREG_ram_0" 
"sys_inst/CPUUnit/cpu/REGS/SREG_ram*" 
"sys_inst/CPUUnit/cpu/REGS/SREG_1_ram_2" 
"sys_inst/CPUUnit/cpu/REGS/SREG_1_ram_1" 
"sys_inst/CPUUnit/cpu/REGS/SREG_1_ram_0" 
"sys_inst/CPUUnit/cpu/REGS/SREG_1_ram*" 
"sys_inst/CPUUnit/cpu/REGS/TMP16[0]" 
"sys_inst/CPUUnit/cpu/REGS/TMP16[1]" 
"sys_inst/CPUUnit/cpu/REGS/TMP16[2]" 
"sys_inst/CPUUnit/cpu/REGS/TMP16[3]" 
"sys_inst/CPUUnit/cpu/REGS/TMP16[4]" 
"sys_inst/CPUUnit/cpu/REGS/TMP16[5]" 
"sys_inst/CPUUnit/cpu/REGS/TMP16[6]" 
"sys_inst/CPUUnit/cpu/REGS/TMP16[7]" 
"sys_inst/CPUUnit/cpu/REGS/TMP16[8]" 
"sys_inst/CPUUnit/cpu/REGS/TMP16[9]" 
"sys_inst/CPUUnit/cpu/REGS/TMP16[10]" 
"sys_inst/CPUUnit/cpu/REGS/TMP16[11]" 
"sys_inst/CPUUnit/cpu/REGS/TMP16[12]" 
"sys_inst/CPUUnit/cpu/REGS/TMP16[13]" 
"sys_inst/CPUUnit/cpu/REGS/TMP16[14]" 
"sys_inst/CPUUnit/cpu/REGS/TMP16[15]" ;
MULTICYCLE FROM GROUP "GROUP_CPU" CLKNET "sys_inst.clk_cpu" 2.000000 X ;
BLOCK PATH FROM CLKNET "sys_inst.clk_sdr" TO CLKNET "sys_inst.clk_25" ;
BLOCK PATH FROM CLKNET "sys_inst.clk_25" TO CLKNET "sys_inst.clk_sdr" ;
