/* Verilog netlist generated by SCUBA Diamond (64-bit) 3.9.1.119 */
/* Module Version: 5.8 */
/* C:\lscc\diamond\3.9_x64\ispfpga\bin\nt64\scuba.exe -w -n q16 -lang verilog -synth synplify -bus_exp 7 -bb -arch xo2c00 -type ebfifo -depth 8 -width 8 -rwidth 8 -pfu_fifo -no_enable -pe -1 -pf -1  */
/* Thu Oct 05 10:21:31 2017 */


`timescale 1 ns / 1 ps
module q16 (Data, WrClock, RdClock, WrEn, RdEn, Reset, RPReset, Q, Empty, 
    Full)/* synthesis NGD_DRC_MASK=1 */;
    input wire [7:0] Data;
    input wire WrClock;
    input wire RdClock;
    input wire WrEn;
    input wire RdEn;
    input wire Reset;
    input wire RPReset;
    output wire [7:0] Q;
    output wire Empty;
    output wire Full;

    wire invout_1;
    wire invout_0;
    wire w_gdata_0;
    wire w_gdata_1;
    wire w_gdata_2;
    wire wptr_3;
    wire r_gdata_0;
    wire r_gdata_1;
    wire r_gdata_2;
    wire rptr_3;
    wire w_gcount_0;
    wire w_gcount_1;
    wire w_gcount_2;
    wire w_gcount_3;
    wire r_gcount_0;
    wire r_gcount_1;
    wire r_gcount_2;
    wire r_gcount_3;
    wire w_gcount_r20;
    wire w_gcount_r0;
    wire w_gcount_r21;
    wire w_gcount_r1;
    wire w_gcount_r22;
    wire w_gcount_r2;
    wire w_gcount_r23;
    wire w_gcount_r3;
    wire r_gcount_w20;
    wire r_gcount_w0;
    wire r_gcount_w21;
    wire r_gcount_w1;
    wire r_gcount_w22;
    wire r_gcount_w2;
    wire r_gcount_w23;
    wire r_gcount_w3;
    wire empty_i;
    wire rRst;
    wire full_i;
    wire iwcount_0;
    wire iwcount_1;
    wire w_gctr_ci;
    wire iwcount_2;
    wire iwcount_3;
    wire co1;
    wire co0;
    wire wcount_3;
    wire ircount_0;
    wire ircount_1;
    wire r_gctr_ci;
    wire ircount_2;
    wire ircount_3;
    wire co1_1;
    wire co0_1;
    wire rcount_3;
    wire rden_i;
    wire cmp_ci;
    wire w_g2b_xor_cluster_0;
    wire wcount_r1;
    wire rcount_0;
    wire rcount_1;
    wire co0_2;
    wire wcount_r2;
    wire empty_cmp_clr;
    wire rcount_2;
    wire empty_cmp_set;
    wire empty_d;
    wire empty_d_c;
    wire wren_i;
    wire cmp_ci_1;
    wire r_g2b_xor_cluster_0;
    wire rcount_w1;
    wire wcount_0;
    wire wcount_1;
    wire co0_3;
    wire rcount_w2;
    wire full_cmp_clr;
    wire wcount_2;
    wire full_cmp_set;
    wire full_d;
    wire full_d_c;
    wire scuba_vlo;
    wire rdataout7;
    wire rdataout6;
    wire rdataout5;
    wire rdataout4;
    wire rdataout3;
    wire rdataout2;
    wire rdataout1;
    wire rdataout0;
    wire rptr_2;
    wire rptr_1;
    wire rptr_0;
    wire dec0_wre3;
    wire scuba_vhi;
    wire wptr_2;
    wire wptr_1;
    wire wptr_0;

    AND2 AND2_t8 (.A(WrEn), .B(invout_1), .Z(wren_i));

    INV INV_1 (.A(full_i), .Z(invout_1));

    AND2 AND2_t7 (.A(RdEn), .B(invout_0), .Z(rden_i));

    INV INV_0 (.A(empty_i), .Z(invout_0));

    OR2 OR2_t6 (.A(Reset), .B(RPReset), .Z(rRst));

    XOR2 XOR2_t5 (.A(wcount_0), .B(wcount_1), .Z(w_gdata_0));

    XOR2 XOR2_t4 (.A(wcount_1), .B(wcount_2), .Z(w_gdata_1));

    XOR2 XOR2_t3 (.A(wcount_2), .B(wcount_3), .Z(w_gdata_2));

    XOR2 XOR2_t2 (.A(rcount_0), .B(rcount_1), .Z(r_gdata_0));

    XOR2 XOR2_t1 (.A(rcount_1), .B(rcount_2), .Z(r_gdata_1));

    XOR2 XOR2_t0 (.A(rcount_2), .B(rcount_3), .Z(r_gdata_2));

    defparam LUT4_10.initval =  16'h8000 ;
    ROM16X1A LUT4_10 (.AD3(scuba_vhi), .AD2(wren_i), .AD1(scuba_vhi), .AD0(scuba_vhi), 
        .DO0(dec0_wre3));

    defparam LUT4_9.initval =  16'h6996 ;
    ROM16X1A LUT4_9 (.AD3(w_gcount_r20), .AD2(w_gcount_r21), .AD1(w_gcount_r22), 
        .AD0(w_gcount_r23), .DO0(w_g2b_xor_cluster_0));

    defparam LUT4_8.initval =  16'h6996 ;
    ROM16X1A LUT4_8 (.AD3(w_gcount_r22), .AD2(w_gcount_r23), .AD1(scuba_vlo), 
        .AD0(scuba_vlo), .DO0(wcount_r2));

    defparam LUT4_7.initval =  16'h6996 ;
    ROM16X1A LUT4_7 (.AD3(w_gcount_r21), .AD2(w_gcount_r22), .AD1(w_gcount_r23), 
        .AD0(scuba_vlo), .DO0(wcount_r1));

    defparam LUT4_6.initval =  16'h6996 ;
    ROM16X1A LUT4_6 (.AD3(r_gcount_w20), .AD2(r_gcount_w21), .AD1(r_gcount_w22), 
        .AD0(r_gcount_w23), .DO0(r_g2b_xor_cluster_0));

    defparam LUT4_5.initval =  16'h6996 ;
    ROM16X1A LUT4_5 (.AD3(r_gcount_w22), .AD2(r_gcount_w23), .AD1(scuba_vlo), 
        .AD0(scuba_vlo), .DO0(rcount_w2));

    defparam LUT4_4.initval =  16'h6996 ;
    ROM16X1A LUT4_4 (.AD3(r_gcount_w21), .AD2(r_gcount_w22), .AD1(r_gcount_w23), 
        .AD0(scuba_vlo), .DO0(rcount_w1));

    defparam LUT4_3.initval =  16'h0410 ;
    ROM16X1A LUT4_3 (.AD3(rptr_3), .AD2(rcount_3), .AD1(w_gcount_r23), .AD0(scuba_vlo), 
        .DO0(empty_cmp_set));

    defparam LUT4_2.initval =  16'h1004 ;
    ROM16X1A LUT4_2 (.AD3(rptr_3), .AD2(rcount_3), .AD1(w_gcount_r23), .AD0(scuba_vlo), 
        .DO0(empty_cmp_clr));

    defparam LUT4_1.initval =  16'h0140 ;
    ROM16X1A LUT4_1 (.AD3(wptr_3), .AD2(wcount_3), .AD1(r_gcount_w23), .AD0(scuba_vlo), 
        .DO0(full_cmp_set));

    defparam LUT4_0.initval =  16'h4001 ;
    ROM16X1A LUT4_0 (.AD3(wptr_3), .AD2(wcount_3), .AD1(r_gcount_w23), .AD0(scuba_vlo), 
        .DO0(full_cmp_clr));

    FD1P3BX FF_49 (.D(iwcount_0), .SP(wren_i), .CK(WrClock), .PD(Reset), 
        .Q(wcount_0))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_48 (.D(iwcount_1), .SP(wren_i), .CK(WrClock), .CD(Reset), 
        .Q(wcount_1))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_47 (.D(iwcount_2), .SP(wren_i), .CK(WrClock), .CD(Reset), 
        .Q(wcount_2))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_46 (.D(iwcount_3), .SP(wren_i), .CK(WrClock), .CD(Reset), 
        .Q(wcount_3))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_45 (.D(w_gdata_0), .SP(wren_i), .CK(WrClock), .CD(Reset), 
        .Q(w_gcount_0))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_44 (.D(w_gdata_1), .SP(wren_i), .CK(WrClock), .CD(Reset), 
        .Q(w_gcount_1))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_43 (.D(w_gdata_2), .SP(wren_i), .CK(WrClock), .CD(Reset), 
        .Q(w_gcount_2))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_42 (.D(wcount_3), .SP(wren_i), .CK(WrClock), .CD(Reset), 
        .Q(w_gcount_3))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_41 (.D(wcount_0), .SP(wren_i), .CK(WrClock), .CD(Reset), 
        .Q(wptr_0))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_40 (.D(wcount_1), .SP(wren_i), .CK(WrClock), .CD(Reset), 
        .Q(wptr_1))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_39 (.D(wcount_2), .SP(wren_i), .CK(WrClock), .CD(Reset), 
        .Q(wptr_2))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_38 (.D(wcount_3), .SP(wren_i), .CK(WrClock), .CD(Reset), 
        .Q(wptr_3))
             /* synthesis GSR="ENABLED" */;

    FD1P3BX FF_37 (.D(ircount_0), .SP(rden_i), .CK(RdClock), .PD(rRst), 
        .Q(rcount_0))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_36 (.D(ircount_1), .SP(rden_i), .CK(RdClock), .CD(rRst), 
        .Q(rcount_1))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_35 (.D(ircount_2), .SP(rden_i), .CK(RdClock), .CD(rRst), 
        .Q(rcount_2))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_34 (.D(ircount_3), .SP(rden_i), .CK(RdClock), .CD(rRst), 
        .Q(rcount_3))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_33 (.D(r_gdata_0), .SP(rden_i), .CK(RdClock), .CD(rRst), 
        .Q(r_gcount_0))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_32 (.D(r_gdata_1), .SP(rden_i), .CK(RdClock), .CD(rRst), 
        .Q(r_gcount_1))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_31 (.D(r_gdata_2), .SP(rden_i), .CK(RdClock), .CD(rRst), 
        .Q(r_gcount_2))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_30 (.D(rcount_3), .SP(rden_i), .CK(RdClock), .CD(rRst), .Q(r_gcount_3))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_29 (.D(rcount_0), .SP(rden_i), .CK(RdClock), .CD(rRst), .Q(rptr_0))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_28 (.D(rcount_1), .SP(rden_i), .CK(RdClock), .CD(rRst), .Q(rptr_1))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_27 (.D(rcount_2), .SP(rden_i), .CK(RdClock), .CD(rRst), .Q(rptr_2))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_26 (.D(rcount_3), .SP(rden_i), .CK(RdClock), .CD(rRst), .Q(rptr_3))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_25 (.D(rdataout0), .SP(rden_i), .CK(RdClock), .CD(rRst), 
        .Q(Q[0]))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_24 (.D(rdataout1), .SP(rden_i), .CK(RdClock), .CD(rRst), 
        .Q(Q[1]))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_23 (.D(rdataout2), .SP(rden_i), .CK(RdClock), .CD(rRst), 
        .Q(Q[2]))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_22 (.D(rdataout3), .SP(rden_i), .CK(RdClock), .CD(rRst), 
        .Q(Q[3]))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_21 (.D(rdataout4), .SP(rden_i), .CK(RdClock), .CD(rRst), 
        .Q(Q[4]))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_20 (.D(rdataout5), .SP(rden_i), .CK(RdClock), .CD(rRst), 
        .Q(Q[5]))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_19 (.D(rdataout6), .SP(rden_i), .CK(RdClock), .CD(rRst), 
        .Q(Q[6]))
             /* synthesis GSR="ENABLED" */;

    FD1P3DX FF_18 (.D(rdataout7), .SP(rden_i), .CK(RdClock), .CD(rRst), 
        .Q(Q[7]))
             /* synthesis GSR="ENABLED" */;

    FD1S3DX FF_17 (.D(w_gcount_0), .CK(RdClock), .CD(Reset), .Q(w_gcount_r0))
             /* synthesis GSR="ENABLED" */;

    FD1S3DX FF_16 (.D(w_gcount_1), .CK(RdClock), .CD(Reset), .Q(w_gcount_r1))
             /* synthesis GSR="ENABLED" */;

    FD1S3DX FF_15 (.D(w_gcount_2), .CK(RdClock), .CD(Reset), .Q(w_gcount_r2))
             /* synthesis GSR="ENABLED" */;

    FD1S3DX FF_14 (.D(w_gcount_3), .CK(RdClock), .CD(Reset), .Q(w_gcount_r3))
             /* synthesis GSR="ENABLED" */;

    FD1S3DX FF_13 (.D(r_gcount_0), .CK(WrClock), .CD(rRst), .Q(r_gcount_w0))
             /* synthesis GSR="ENABLED" */;

    FD1S3DX FF_12 (.D(r_gcount_1), .CK(WrClock), .CD(rRst), .Q(r_gcount_w1))
             /* synthesis GSR="ENABLED" */;

    FD1S3DX FF_11 (.D(r_gcount_2), .CK(WrClock), .CD(rRst), .Q(r_gcount_w2))
             /* synthesis GSR="ENABLED" */;

    FD1S3DX FF_10 (.D(r_gcount_3), .CK(WrClock), .CD(rRst), .Q(r_gcount_w3))
             /* synthesis GSR="ENABLED" */;

    FD1S3DX FF_9 (.D(w_gcount_r0), .CK(RdClock), .CD(Reset), .Q(w_gcount_r20))
             /* synthesis GSR="ENABLED" */;

    FD1S3DX FF_8 (.D(w_gcount_r1), .CK(RdClock), .CD(Reset), .Q(w_gcount_r21))
             /* synthesis GSR="ENABLED" */;

    FD1S3DX FF_7 (.D(w_gcount_r2), .CK(RdClock), .CD(Reset), .Q(w_gcount_r22))
             /* synthesis GSR="ENABLED" */;

    FD1S3DX FF_6 (.D(w_gcount_r3), .CK(RdClock), .CD(Reset), .Q(w_gcount_r23))
             /* synthesis GSR="ENABLED" */;

    FD1S3DX FF_5 (.D(r_gcount_w0), .CK(WrClock), .CD(rRst), .Q(r_gcount_w20))
             /* synthesis GSR="ENABLED" */;

    FD1S3DX FF_4 (.D(r_gcount_w1), .CK(WrClock), .CD(rRst), .Q(r_gcount_w21))
             /* synthesis GSR="ENABLED" */;

    FD1S3DX FF_3 (.D(r_gcount_w2), .CK(WrClock), .CD(rRst), .Q(r_gcount_w22))
             /* synthesis GSR="ENABLED" */;

    FD1S3DX FF_2 (.D(r_gcount_w3), .CK(WrClock), .CD(rRst), .Q(r_gcount_w23))
             /* synthesis GSR="ENABLED" */;

    FD1S3BX FF_1 (.D(empty_d), .CK(RdClock), .PD(rRst), .Q(empty_i))
             /* synthesis GSR="ENABLED" */;

    FD1S3DX FF_0 (.D(full_d), .CK(WrClock), .CD(Reset), .Q(full_i))
             /* synthesis GSR="ENABLED" */;

    FADD2B w_gctr_cia (.A0(scuba_vlo), .A1(scuba_vhi), .B0(scuba_vlo), .B1(scuba_vhi), 
        .CI(scuba_vlo), .COUT(w_gctr_ci), .S0(), .S1());

    CU2 w_gctr_0 (.CI(w_gctr_ci), .PC0(wcount_0), .PC1(wcount_1), .CO(co0), 
        .NC0(iwcount_0), .NC1(iwcount_1));

    CU2 w_gctr_1 (.CI(co0), .PC0(wcount_2), .PC1(wcount_3), .CO(co1), .NC0(iwcount_2), 
        .NC1(iwcount_3));

    FADD2B r_gctr_cia (.A0(scuba_vlo), .A1(scuba_vhi), .B0(scuba_vlo), .B1(scuba_vhi), 
        .CI(scuba_vlo), .COUT(r_gctr_ci), .S0(), .S1());

    CU2 r_gctr_0 (.CI(r_gctr_ci), .PC0(rcount_0), .PC1(rcount_1), .CO(co0_1), 
        .NC0(ircount_0), .NC1(ircount_1));

    CU2 r_gctr_1 (.CI(co0_1), .PC0(rcount_2), .PC1(rcount_3), .CO(co1_1), 
        .NC0(ircount_2), .NC1(ircount_3));

    FADD2B empty_cmp_ci_a (.A0(scuba_vlo), .A1(rden_i), .B0(scuba_vlo), 
        .B1(rden_i), .CI(scuba_vlo), .COUT(cmp_ci), .S0(), .S1());

    AGEB2 empty_cmp_0 (.A0(rcount_0), .A1(rcount_1), .B0(w_g2b_xor_cluster_0), 
        .B1(wcount_r1), .CI(cmp_ci), .GE(co0_2));

    AGEB2 empty_cmp_1 (.A0(rcount_2), .A1(empty_cmp_set), .B0(wcount_r2), 
        .B1(empty_cmp_clr), .CI(co0_2), .GE(empty_d_c));

    FADD2B a0 (.A0(scuba_vlo), .A1(scuba_vlo), .B0(scuba_vlo), .B1(scuba_vlo), 
        .CI(empty_d_c), .COUT(), .S0(empty_d), .S1());

    FADD2B full_cmp_ci_a (.A0(scuba_vlo), .A1(wren_i), .B0(scuba_vlo), .B1(wren_i), 
        .CI(scuba_vlo), .COUT(cmp_ci_1), .S0(), .S1());

    AGEB2 full_cmp_0 (.A0(wcount_0), .A1(wcount_1), .B0(r_g2b_xor_cluster_0), 
        .B1(rcount_w1), .CI(cmp_ci_1), .GE(co0_3));

    AGEB2 full_cmp_1 (.A0(wcount_2), .A1(full_cmp_set), .B0(rcount_w2), 
        .B1(full_cmp_clr), .CI(co0_3), .GE(full_d_c));

    VLO scuba_vlo_inst (.Z(scuba_vlo));

    FADD2B a1 (.A0(scuba_vlo), .A1(scuba_vlo), .B0(scuba_vlo), .B1(scuba_vlo), 
        .CI(full_d_c), .COUT(), .S0(full_d), .S1());

    defparam fifo_pfu_0_0.initval = "0x0000000000000000" ;
    DPR16X4C fifo_pfu_0_0 (.DI0(Data[4]), .DI1(Data[5]), .DI2(Data[6]), 
        .DI3(Data[7]), .WCK(WrClock), .WRE(dec0_wre3), .RAD0(rptr_0), .RAD1(rptr_1), 
        .RAD2(rptr_2), .RAD3(scuba_vhi), .WAD0(wptr_0), .WAD1(wptr_1), .WAD2(wptr_2), 
        .WAD3(scuba_vhi), .DO0(rdataout4), .DO1(rdataout5), .DO2(rdataout6), 
        .DO3(rdataout7))
             /* synthesis MEM_INIT_FILE="(0-7)(0-3)" */
             /* synthesis MEM_LPC_FILE="q16.lpc" */
             /* synthesis COMP="fifo_pfu_0_0" */;

    VHI scuba_vhi_inst (.Z(scuba_vhi));

    defparam fifo_pfu_0_1.initval = "0x0000000000000000" ;
    DPR16X4C fifo_pfu_0_1 (.DI0(Data[0]), .DI1(Data[1]), .DI2(Data[2]), 
        .DI3(Data[3]), .WCK(WrClock), .WRE(dec0_wre3), .RAD0(rptr_0), .RAD1(rptr_1), 
        .RAD2(rptr_2), .RAD3(scuba_vhi), .WAD0(wptr_0), .WAD1(wptr_1), .WAD2(wptr_2), 
        .WAD3(scuba_vhi), .DO0(rdataout0), .DO1(rdataout1), .DO2(rdataout2), 
        .DO3(rdataout3))
             /* synthesis MEM_INIT_FILE="(0-7)(4-7)" */
             /* synthesis MEM_LPC_FILE="q16.lpc" */
             /* synthesis COMP="fifo_pfu_0_1" */;

    assign Empty = empty_i;
    assign Full = full_i;


    // exemplar begin
    // exemplar attribute FF_49 GSR ENABLED
    // exemplar attribute FF_48 GSR ENABLED
    // exemplar attribute FF_47 GSR ENABLED
    // exemplar attribute FF_46 GSR ENABLED
    // exemplar attribute FF_45 GSR ENABLED
    // exemplar attribute FF_44 GSR ENABLED
    // exemplar attribute FF_43 GSR ENABLED
    // exemplar attribute FF_42 GSR ENABLED
    // exemplar attribute FF_41 GSR ENABLED
    // exemplar attribute FF_40 GSR ENABLED
    // exemplar attribute FF_39 GSR ENABLED
    // exemplar attribute FF_38 GSR ENABLED
    // exemplar attribute FF_37 GSR ENABLED
    // exemplar attribute FF_36 GSR ENABLED
    // exemplar attribute FF_35 GSR ENABLED
    // exemplar attribute FF_34 GSR ENABLED
    // exemplar attribute FF_33 GSR ENABLED
    // exemplar attribute FF_32 GSR ENABLED
    // exemplar attribute FF_31 GSR ENABLED
    // exemplar attribute FF_30 GSR ENABLED
    // exemplar attribute FF_29 GSR ENABLED
    // exemplar attribute FF_28 GSR ENABLED
    // exemplar attribute FF_27 GSR ENABLED
    // exemplar attribute FF_26 GSR ENABLED
    // exemplar attribute FF_25 GSR ENABLED
    // exemplar attribute FF_24 GSR ENABLED
    // exemplar attribute FF_23 GSR ENABLED
    // exemplar attribute FF_22 GSR ENABLED
    // exemplar attribute FF_21 GSR ENABLED
    // exemplar attribute FF_20 GSR ENABLED
    // exemplar attribute FF_19 GSR ENABLED
    // exemplar attribute FF_18 GSR ENABLED
    // exemplar attribute FF_17 GSR ENABLED
    // exemplar attribute FF_16 GSR ENABLED
    // exemplar attribute FF_15 GSR ENABLED
    // exemplar attribute FF_14 GSR ENABLED
    // exemplar attribute FF_13 GSR ENABLED
    // exemplar attribute FF_12 GSR ENABLED
    // exemplar attribute FF_11 GSR ENABLED
    // exemplar attribute FF_10 GSR ENABLED
    // exemplar attribute FF_9 GSR ENABLED
    // exemplar attribute FF_8 GSR ENABLED
    // exemplar attribute FF_7 GSR ENABLED
    // exemplar attribute FF_6 GSR ENABLED
    // exemplar attribute FF_5 GSR ENABLED
    // exemplar attribute FF_4 GSR ENABLED
    // exemplar attribute FF_3 GSR ENABLED
    // exemplar attribute FF_2 GSR ENABLED
    // exemplar attribute FF_1 GSR ENABLED
    // exemplar attribute FF_0 GSR ENABLED
    // exemplar attribute fifo_pfu_0_0 MEM_INIT_FILE (0-7)(0-3)
    // exemplar attribute fifo_pfu_0_0 MEM_LPC_FILE q16.lpc
    // exemplar attribute fifo_pfu_0_0 COMP fifo_pfu_0_0
    // exemplar attribute fifo_pfu_0_1 MEM_INIT_FILE (0-7)(4-7)
    // exemplar attribute fifo_pfu_0_1 MEM_LPC_FILE q16.lpc
    // exemplar attribute fifo_pfu_0_1 COMP fifo_pfu_0_1
    // exemplar end

endmodule
