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echo "Compiling Core Verilog UNISIM/Behavioral model"
vlogcomp -work work ..\\..\\implement\\results\\routed.v

echo "Compiling Test Bench Files"
vhpcomp -work work ..\\opl3_in_pkg.vhd
vhpcomp -work work ..\\opl3_in_rng.vhd 
vhpcomp -work work ..\\opl3_in_dgen.vhd
vhpcomp -work work ..\\opl3_in_dverif.vhd
vhpcomp -work work ..\\opl3_in_pctrl.vhd 
vhpcomp -work work ..\\opl3_in_synth.vhd 
vhpcomp -work work ..\\opl3_in_tb.vhd

fuse work.opl3_in_tb work.glbl -L simprims_ver -o opl3_in_tb.exe

.\\opl3_in_tb.exe -sdfmax /opl3_in_tb/opl3_in_synth_inst/opl3_in_inst=..\\..\\implement\\results\\routed.sdf -gui -tclbatch .\\wave_isim.tcl
