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Pipelined AVR microcontroller Modules
Here is a list of all modules:
Introduction
AVR architecture
AVR instruction set
Implementation
Pipeline structure
Hardware resources
Register File
Read port 1
Read port 2
Write port
X port
Y port
Z port
Bypass Unit
Bypass chain 0
Bypass chain 1
Bypass chain 2
IO File
General IO port
SREG port
SP port
RAMPX port
RAMPY port
RAMPZ port
RAMPD port
EIND port
Peripherals
Port A
External interrupt 0
Timer 0
ALU
DACU
Data Memory
Program Memory
Stall and Flush Unit
Pipeline details
ALU
IOF access
DACU access
Jumps
Branches
Skips
Calls
Returns
Interrupts
Others
Testing
Bugs
FPGA prototyping
Sources
References
Some final thoughts
About ...
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