Subversion Repositories pipelined_fixed_point_elementary_functions

Quartus II Archive log --       C:/Les/Projects/fpga/verilog/ibniz/DE2_115_VGA.qarlog

Archive:        C:/Les/Projects/fpga/verilog/ibniz/DE2_115_VGA.qar
Date:           Mon Dec 30 14:43:59 2013
Quartus II 32-bit               13.0.1 Build 232 06/12/2013 SP 1 SJ Web Edition

        =========== Files Selected: ===========
C:/Les/Projects/fpga/Terasic/DE0_VGA_les/V/SEG7_LUT.v
C:/Les/Projects/fpga/Terasic/DE0_VGA_les/V/VGA_CLK.v
C:/Les/Projects/fpga/Terasic/DE0_VGA_les/V/VGA_Ctrl.v
C:/Les/Projects/fpga/Terasic/DE0_VGA_les/V/VGA_Pattern.v
C:/Les/Projects/fpga/Terasic/DE2_115_VGA/DE2_115_VGA.SDC
C:/Les/Projects/fpga/Terasic/DE2_115_VGA/DE2_115_VGA.qpf
C:/Les/Projects/fpga/Terasic/DE2_115_VGA/DE2_115_VGA.qsf
C:/Les/Projects/fpga/Terasic/DE2_115_VGA/DE2_115_VGA.sdc
C:/Les/Projects/fpga/Terasic/DE2_115_VGA/DE2_115_VGA.v
C:/Les/Projects/fpga/Terasic/DE2_115_VGA/DE2_115_VGA_assignment_defaults.qdf
C:/Les/Projects/fpga/Terasic/DE2_115_VGA/incremental_db/compiled_partitions/DE2_115_VGA.db_info
C:/Les/Projects/fpga/verilog/ibniz/ibniz.v
C:/Les/Projects/fpga/verilog/ibniz/ibniz_units.v
C:/Les/Projects/fpga/verilog/ibniz/ibniz_units_old.v
C:/Les/Projects/fpga/verilog/ibniz/jupiter.v
C:/Les/Projects/fpga/verilog/math_pipelined/atan2_pipelined.sv
C:/Les/Projects/fpga/verilog/math_pipelined/exp_pipelined.sv
C:/Les/Projects/fpga/verilog/math_pipelined/math_pipelined.sv
C:/Les/Projects/fpga/verilog/math_pipelined/sin_pipelined.sv
C:/Les/Projects/fpga/verilog/math_pipelined/sqrt_pipelined.sv
        ======= Total: 20 files to archive =======

        ================ Status: ===============
All files archived successfully.