Subversion Repositories qaz_libs

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//// Copyright (C) 2017 Authors and OPENCORES.ORG                 ////
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interface
  riffa_register_if
  #(
    N, // data bus width in bytes
    B, // number of register banks
    RW = (N/4), // width of the bus in 32 bit words
    RC = RW * B // number of available registers
  )
  (
    input clk,
    input reset
  );

  wire  [31:0]  register_in   [RC-1:0];
  reg   [31:0]  register_out  [RC-1:0];
  reg           wr_en         [RC-1:0];


// --------------------------------------------------------------------
//
endinterface