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[/] [qaz_libs/] [trunk/] [PCIe/] [src/] [RIFFA/] [riffa_register_if.sv] - Rev 42
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//////////////////////////////////////////////////////////////////////
//// ////
//// Copyright (C) 2017 Authors and OPENCORES.ORG ////
//// ////
//// This source file may be used and distributed without ////
//// restriction provided that this copyright statement is not ////
//// removed from the file and that any derivative work contains ////
//// the original copyright notice and the associated disclaimer. ////
//// ////
//// This source file is free software; you can redistribute it ////
//// and/or modify it under the terms of the GNU Lesser General ////
//// Public License as published by the Free Software Foundation; ////
//// either version 2.1 of the License, or (at your option) any ////
//// later version. ////
//// ////
//// This source is distributed in the hope that it will be ////
//// useful, but WITHOUT ANY WARRANTY; without even the implied ////
//// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR ////
//// PURPOSE. See the GNU Lesser General Public License for more ////
//// details. ////
//// ////
//// You should have received a copy of the GNU Lesser General ////
//// Public License along with this source; if not, download it ////
//// from http://www.opencores.org/lgpl.shtml ////
//// ////
//////////////////////////////////////////////////////////////////////
interface
riffa_register_if
#(
N, // data bus width in bytes
B, // number of register banks
RW = (N/4), // width of the bus in 32 bit words
RC = RW * B // number of available registers
)
(
input clk,
input reset
);
wire [31:0] register_in [RC-1:0];
reg [31:0] register_out [RC-1:0];
reg wr_en [RC-1:0];
// --------------------------------------------------------------------
//
endinterface
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