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[/] [qaz_libs/] [trunk/] [axi4_lite_lib/] [sim/] [tests/] [debug_axi4_lite_register_file/] [the_test.sv] - Rev 29
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////////////////////////////////////////////////////////////////////////// //////// Copyright (C) 2015 Authors and OPENCORES.ORG //////// //////// This source file may be used and distributed without //////// restriction provided that this copyright statement is not //////// removed from the file and that any derivative work contains //////// the original copyright notice and the associated disclaimer. //////// //////// This source file is free software; you can redistribute it //////// and/or modify it under the terms of the GNU Lesser General //////// Public License as published by the Free Software Foundation; //////// either version 2.1 of the License, or (at your option) any //////// later version. //////// //////// This source is distributed in the hope that it will be //////// useful, but WITHOUT ANY WARRANTY; without even the implied //////// warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR //////// PURPOSE. See the GNU Lesser General Public License for more //////// details. //////// //////// You should have received a copy of the GNU Lesser General //////// Public License along with this source; if not, download it //////// from http://www.opencores.org/lgpl.shtml //////// //////////////////////////////////////////////////////////////////////////`timescale 1ps/1psmodulethe_test(input tb_clk,input tb_rst);// --------------------------------------------------------------------//localparam A = tb_top.A;localparam N = tb_top.N;// --------------------------------------------------------------------//import axi4_transaction_pkg::*;axi4_payload_class payload_h;// --------------------------------------------------------------------//logic [(8*N)-1:0] data[];logic [1:0] resp;task run_the_test;// --------------------------------------------------------------------// insert test below// --------------------------------------------------------------------$display("^^^---------------------------------");$display("^^^ %16.t | Testbench begun.\n", $time);$display("^^^---------------------------------");// --------------------------------------------------------------------tb_top.tb.timeout_stop(20us);// tb_top.tb.timeout_stop(300ns);// --------------------------------------------------------------------wait(~tb_rst);data = new[1];// --------------------------------------------------------------------#100ns;data[0] = 32'h_abba_beef;tb_top.bfm.basic_write(32'h1234_0000, data, resp);// --------------------------------------------------------------------#100ns;data[0] = 32'h_cafe_1a7e;tb_top.bfm.basic_write(32'h1234_0004, data, resp);// --------------------------------------------------------------------#100ns;data[0] = 32'h_0123_4567;tb_top.bfm.basic_write(32'h1234_0008, data, resp);// --------------------------------------------------------------------#100ns;data[0] = 32'h_89ab_cdef;tb_top.bfm.basic_write(32'h1234_000c, data, resp);// --------------------------------------------------------------------#100ns;for(int i = 0; i < 4*4; i += 4)begintb_top.bfm.basic_read(32'h1234_0000 + i, data, resp);$display("^^^ %16.t | 0x%08x |", $time, data[0]);end// --------------------------------------------------------------------#100ns;for(int i = 0; i < 8*4; i += 4)tb_top.bfm.basic_random_write(32'habcd_0000 + i, resp);// --------------------------------------------------------------------#100ns;for(int i = 0; i < 8*4; i += 4)begintb_top.bfm.basic_read(32'habcd_0000 + i, data, resp);$display("^^^ %16.t | 0x%08x |", $time, data[0]);end// --------------------------------------------------------------------#150ns;// --------------------------------------------------------------------// insert test above// --------------------------------------------------------------------endtaskendmodule
