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[/] [rf6809/] [trunk/] [software/] [boot/] [boot_rom.lst] - Rev 15
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3 error(s), 526 warning(s) unlisted in pass 1
; ============================================================================
; __
; \\__/ o\ (C) 2013-2022 Robert Finch, Waterloo
; \ __ / All rights reserved.
; \/_// robfinch<remove>@opencores.org
; ||
;
;
; BSD 3-Clause License
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
;
; 1. Redistributions of source code must retain the above copyright notice, this
; list of conditions and the following disclaimer.
;
; 2. Redistributions in binary form must reproduce the above copyright notice,
; this list of conditions and the following disclaimer in the documentation
; and/or other materials provided with the distribution.
;
; 3. Neither the name of the copyright holder nor the names of its
; contributors may be used to endorse or promote products derived from
; this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ============================================================================
;
; ============================================================================
; __
; \\__/ o\ (C) 2013-2022 Robert Finch, Waterloo
; \ __ / All rights reserved.
; \/_// robfinch<remove>@opencores.org
; ||
;
;
; BSD 3-Clause License
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
;
; 1. Redistributions of source code must retain the above copyright notice, this
; list of conditions and the following disclaimer.
;
; 2. Redistributions in binary form must reproduce the above copyright notice,
; this list of conditions and the following disclaimer in the documentation
; and/or other materials provided with the distribution.
;
; 3. Neither the name of the copyright holder nor the names of its
; contributors may be used to endorse or promote products derived from
; this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ============================================================================
;
CR EQU $0D ;ASCII equates
LF EQU $0A
TAB EQU $09
CTRLC EQU $03
CTRLH EQU $08
CTRLI EQU $09
CTRLJ EQU $0A
CTRLK EQU $0B
CTRLM EQU $0D
CTRLS EQU $13
CTRLT EQU $14
CTRLX EQU $18
XON EQU $11
XOFF EQU $13
FIRST_CORE EQU 1
MAX_TASKNO EQU 63
DRAM_BASE EQU $10000000
; ROM monitor functions
;
MF_Monitor EQU 0
MF_INCH EQU 1
MF_OUTCH EQU 2
MF_CRLF EQU 3
MF_DisplayString EQU 4
MF_DisplayByteAsHex EQU 5
MF_DisplayWordAsHex EQU 6
MF_ShowSprites EQU 7
MF_Srand EQU 8
MF_Random EQU 9
MF_OSCALL EQU 10
MF_GetRange EQU 11
mon_numwka EQU $910
mon_r1 EQU $920
mon_r2 EQU $924
; ============================================================================
; __
; \\__/ o\ (C) S2022 Robert Finch, Waterloo
; \ __ / All rights reserved.
; \/_// robfinch<remove>@opencores.org
; ||
;
;
; BSD 3-Clause License
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
;
; 1. Redistributions of source code must retain the above copyright notice, this
; list of conditions and the following disclaimer.
;
; 2. Redistributions in binary form must reproduce the above copyright notice,
; this list of conditions and the following disclaimer in the documentation
; and/or other materials provided with the distribution.
;
; 3. Neither the name of the copyright holder nor the names of its
; contributors may be used to endorse or promote products derived from
; this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ============================================================================
COREID EQU $FFFFFFFE0
MSCOUNT EQU $FFFFFFFE4
LEDS EQU $FFFE60001
VIA EQU $FFFE60000
VIA_PA EQU 1
VIA_DDRA EQU 3
VIA_ACR EQU 11
VIA_IFR EQU 13
VIA_IER EQU 14
VIA_T3LL EQU 18
VIA_T3LH EQU 19
VIA_T3CMPL EQU 20
VIA_T3CMPH EQU 21
TEXTSCR EQU $FFFE00000
TEXTREG EQU $FFFE07F00
TEXT_COLS EQU 0
TEXT_ROWS EQU 1
TEXT_CURPOS EQU 34
COLS EQU 64
ROWS EQU 32
ACIA EQU $FFFE30100
ACIA_TX EQU 0
ACIA_RX EQU 0
ACIA_STAT EQU 1
ACIA_CMD EQU 2
ACIA_CTRL EQU 3
ACIA_CTRL2 EQU 11
RTC EQU $FFFE30500 ; I2C
RTCBuf EQU $7FC0
PRNG EQU $FFFE30600
KEYBD EQU $FFFE30400
KEYBDCLR EQU $FFFE30402
PIC EQU $FFFE3F000
SPRITE_CTRL EQU $FFFE10000
SPRITE_EN EQU $3C0
OUTSEMA EQU $EF0000
SEMAABS EQU $1000
OSSEMA EQU $EF0010
ScreenLocation EQU $10
ColorCodeLocation EQU $14
ScreenLocation2 EQU $18
BlkcpySrc EQU $1C
BlkcpyDst EQU $20
Strptr EQU $24
PICptr EQU $28
; Forth Area
; 0x30-0x60
; Task control blocks, room for 256 tasks
TCB_NxtRdy EQU $00 ; next task on ready / timeout list
TCB_PrvRdy EQU $04 ; previous task on ready / timeout list
TCB_NxtTCB EQU $08
TCB_Timeout EQU $0C
TCB_Priority EQU $10
TCB_MSGPTR_D1 EQU $14
TCB_MSGPTR_D2 EQU $18
TCB_hJCB EQU $1C
TCB_Status EQU $1E
TCB_CursorRow EQU $20
TCB_CursorCol EQU $21
TCB_hWaitMbx EQU $22 ; handle of mailbox task is waiting at
TCB_mbq_next EQU $24 ; mailbox queue next
TCB_mbq_prev EQU $28 ; mailbox queue previous
TCB_iof_next EQU $2C
TCB_iof_prev EQU $30
TCB_SPSave EQU $34 ; TCB_SPSave area
TCB_mmu_map EQU $38
KeybdHead EQU $FFFFFC800
KeybdTail EQU $FFFFFC900
KeybdEcho EQU $FFFFFCA00
KeybdBad EQU $FFFFFCB00
KeybdAck EQU $FFFFFCC00
KeybdLocks EQU $FFFFFCD00
KeybdBuffer EQU $FFFFFC000 ; buffer is 16 chars
BIOS_SCREENS EQU $17000000 ; $17000000 to $171FFFFF
; EhBASIC vars:
;
NmiBase EQU $FFC013
IrqBase EQU $FFC014
IOFocusNdx EQU $100
; These variables in global OS storage area
IOFocusList EQU $FFC000 ; to $FF000F
IOFocusID EQU $FFC010
IrqSource EQU $FFC011
IRQFlag EQU $FFC012
RunningID EQU $FFC013
; These variables use direct page access
CursorRow EQU $110
CursorCol EQU $111
CharColor EQU $112
ScreenColor EQU $113
CursorFlash EQU $114
KeyState1 EQU $120
KeyState2 EQU $121
KeyLED EQU $122
KeybdID EQU $124
KeybdBlock EQU $126
kbdHeadRcv EQU $127
kbdTailRcv EQU $128
kbdFifo EQU $40 ; in local RAM
kbdFifoAlias EQU $C00040 ; to $C0007F ; alias for $40 to $7F
SerhZero EQU $130
SerHeadRcv EQU $131
SertZero EQU $132
SerTailRcv EQU $133
SerHeadXmit EQU $136
SerTailXmit EQU $138
SerRcvXon EQU $139
SerRcvXoff EQU $140
SerRcvBuf EQU $BFF000 ; 4kB serial recieve buffer
farflag EQU $15F
asmbuf EQU $160 ; to $17F
QNdx0 EQU $780
QNdx1 EQU QNdx0+2
QNdx2 EQU QNdx1+2
QNdx3 EQU QNdx2+2
QNdx4 EQU QNdx3+2
FreeTCB EQU QNdx4+2
TimeoutList EQU FreeTCB+2
FreeMbx EQU RunningTCB + 2
nMailbox EQU FreeMbx + 2
FreeMsg EQU nMailbox + 2
nMsgBlk EQU FreeMsg + 2
CharOutVec EQU $800
CharInVec EQU $804
CmdPromptJI EQU $808
MonErrVec EQU $80C
BreakpointFlag EQU $810
NumSetBreakpoints EQU $811
Breakpoints EQU $820 ; to $82F
BreakpointBytes EQU $830 ; to $83F
mon_vectb EQU $880
; Register save area for monitor
mon_DSAVE EQU $900
mon_XSAVE EQU $902
mon_YSAVE EQU $904
mon_USAVE EQU $906
mon_SSAVE EQU $908
mon_PCSAVE EQU $90A
mon_DPRSAVE EQU $90E
mon_CCRSAVE EQU $90F
mon_numwka EQU $910
mon_r1 EQU $920
mon_r2 EQU $924
jmpvec EQU $928
; The ORG directive must set an address a multiple of 4 in order for the Verilog
; output to work correctly.
org $FFD0AC
00FFD0AC 012 nop
00FFD0AD 012 nop
00FFD0AE 012 nop
XBLANK
00FFD0AF 0C6020 ldb #' '
00FFD0B1 017001C5E lbsr OUTCH
00FFD0B4 039 rts
org $FFD0D0
00FFD0D0 012 nop
00FFD0D1 012 nop
CRLF
CRLF1:
00FFD0D2 0C600D ldb #CR
00FFD0D4 017001C3B lbsr OUTCH
00FFD0D7 0C600A ldb #LF
00FFD0D9 017001C36 lbsr OUTCH
00FFD0DC 039 rts
org $FFD0F0
00FFD0F0 012 nop
00FFD0F1 020FDF bra CRLF1
org $FFD1DC
ONEKEY
00FFD1DC 06E90F000804 jmp [CharInVec]
org $FFD2C0
00FFD2C0 012 nop
LETTER
00FFD2C1 017001A4E lbsr OUTCH
00FFD2C4 039 rts
org $FFD2CC
00FFD2CC 012 nop
00FFD2CD 012 nop
HEX2
00FFD2CE 017001142 lbsr DispByteAsHex
00FFD2D1 039 rts
HEX4
00FFD2D2 017001135 lbsr DispWordAsHex
00FFD2D5 039 rts
org $FFD300
ClearScreenJmp
00FFD300 016000F2B lbra ClearScreen
org $FFD308
HomeCursorJmp
00FFD308 016000F96 lbra HomeCursor
org $FFD400
; Local RAM test routine
; Checkerboard testing.
; There is 70kB of local RAM
; Does not use any RAM including no stack
ramtest:
00FFD400 18E000000 ldy #0
00FFD403 086001 lda #1
00FFD405 0150B7FFFE60001 sta LEDS
00FFD40A 0CCAAA555 ldd #$AAA555
ramtest1:
00FFD40D 0EDA01 std ,y++
00FFD40F 18C008000 cmpy #$8000
00FFD412 025FF9 blo ramtest1
; now readback values and compare
00FFD414 18E000000 ldy #0
ramtest3:
00FFD417 0ECA01 ldd ,y++
00FFD419 183AAA555 cmpd #$AAA555
00FFD41C 02600E bne ramerr
00FFD41E 18C008000 cmpy #$8000
00FFD421 025FF4 blo ramtest3
00FFD423 086002 lda #2
00FFD425 0150B7FFFE60001 sta LEDS
00FFD42A 06EC04 jmp ,u
ramerr:
00FFD42C 086080 lda #$80
00FFD42E 0150B7FFFE60001 sta LEDS
00FFD433 08EE00000 ldx #TEXTSCR
00FFD436 0150F6FFFFFFFE0 ldb COREID
00FFD43B 03A abx
00FFD43C 086046 lda #'F'
00FFD43E 0A7804 sta ,x
00FFD440 013 sync
00FFD441 06EC04 jmp ,u
dramtest:
00FFD443 18E010000 ldy #$10000 ; DRAM starts here
00FFD446 086001 lda #1
00FFD448 0150B7FFFE60001 sta LEDS
00FFD44D 0CEAAA555 ldu #$AAA555
00FFD450 017FFFC7F lbsr CRLF
*** warning 1: Long branch within short branch range could be optimized
dramtest1:
00FFD453 04A deca
00FFD454 02600A bne dramtest4
00FFD456 01F020 tfr y,d
00FFD458 017000FAF lbsr DispWordAsHex
00FFD45B 0C600D ldb #CR
00FFD45D 0170018B2 lbsr OUTCH
dramtest4:
00FFD460 0EFA01 stu ,y++
00FFD462 18CE00000 cmpy #$E00000 ; DRAM ends here
00FFD465 025FEC blo dramtest1
; now readback values and compare
00FFD467 18E010000 ldy #$10000
00FFD46A 086001 lda #1
00FFD46C 017FFFC63 lbsr CRLF
*** warning 1: Long branch within short branch range could be optimized
dramtest3:
00FFD46F 04A deca
00FFD470 02600A bne dramtest5
00FFD472 01F020 tfr y,d
00FFD474 017000F93 lbsr DispWordAsHex
00FFD477 0C600D ldb #CR
00FFD479 017001896 lbsr OUTCH
dramtest5:
00FFD47C 2A3A01 cmpu ,y++
00FFD47E 02600F bne dramerr
00FFD480 18CE00000 cmpy #$E00000
00FFD483 025FEA blo dramtest3
00FFD485 086002 lda #2
00FFD487 0150B7FFFE60001 sta LEDS
00FFD48C 016001A18 lbra Monitor
dramerr:
00FFD48F 086080 lda #$80
00FFD491 0150B7FFFE60001 sta LEDS
00FFD496 08EE00000 ldx #TEXTSCR
00FFD499 0150F6FFFFFFFE0 ldb COREID
00FFD49E 03A abx
00FFD49F 086046 lda #'F'
00FFD4A1 0A7804 sta ,x
00FFD4A3 016001A01 lbra Monitor
org $FFE000
00FFE000 FFEEA7 FDB Monitor
00FFE002 FFE022 FDB DumRts ; NEXTCMD
00FFE004 FFECDA FDB INCH
00FFE006 FFECF8 FDB INCHE
00FFE008 FFECFC FDB INCHEK
00FFE00A FFED12 FDB OUTCH
00FFE00C FFE3F7 FDB PDATA
00FFE00E FFE3EA FDB PCRLF
00FFE010 FFE3E6 FDB PSTRNG
00FFE012 FFE022 FDB DumRts ; LRA
00FFE014 FFE022 FDB DumRts
00FFE016 FFE022 FDB DumRts
00FFE018 FFE022 FDB DumRts
00FFE01A FFE022 FDB DumRts ; VINIZ
00FFE01C FFE2FE FDB DisplayChar ; VOUTCH
00FFE01E FFE022 FDB DumRts ; ACINIZ
00FFE020 FFE022 FDB DumRts ; AOUTCH
DumRts:
00FFE022 039 rts
;------------------------------------------------------------------------------
;------------------------------------------------------------------------------
start:
00FFE023 086FFF lda #$FFF ; all cores can do this
00FFE025 0150B7FFFE60003 sta VIA+VIA_DDRA
00FFE02A 086055 lda #$55 ; see if we can at least set LEDs
00FFE02C 0150B7FFFE60001 sta LEDS
00FFE031 086001 lda #1 ; prime OS semaphore
00FFE033 0B7EF1010 sta OSSEMA+$1000
00FFE036 0B7EF1000 sta OUTSEMA+$1000
00FFE039 0CEFFE03F ldu #st6 ; U = return address
00FFE03C 07EFFD400 jmp ramtest ; JMP dont JSR
st6:
00FFE03F 1CE006FFF lds #$6FFF ; boot up stack area
00FFE042 0150B6FFFFFFFE0 lda COREID
00FFE047 081001 cmpa #FIRST_CORE
; beq st8
; sync ; halt cores other than 2
st8:
; bne skip_init
; bsr romToRam
; ldd #st7 & $FFFF
; tfr d,x
; jmp ,x ; jump to the BIOS now in local RAM
st7:
00FFE049 08D15F bsr Delay3s ; give some time for devices to reset
00FFE04B 07F000810 clr BreakpointFlag
00FFE04E 07F000811 clr NumSetBreakpoints
00FFE051 0860AA lda #$AA
00FFE053 0150B7FFFE60001 sta LEDS
00FFE058 086001 lda #FIRST_CORE
00FFE05A 0B7FFC010 sta IOFocusID ; core #2 has focus
00FFE05D 0B7FFC013 sta RunningID
; Clear IO focus list
00FFE060 08E000000 ldx #0
st9:
00FFE063 06F80A000FFC000 clr IOFocusList,x
00FFE068 030001 inx
00FFE06A 08C000010 cmpx #16
00FFE06D 025FF4 blo st9
00FFE06F 086018 lda #24
00FFE071 0B7FFC001 sta IOFocusList+FIRST_CORE
00FFE074 0860CE lda #$0CE
00FFE076 097113 sta ScreenColor
00FFE078 097112 sta CharColor
00FFE07A 08D1B2 bsr ClearScreen
00FFE07C 0CCFFE2FE ldd #DisplayChar
00FFE07F 0FD000800 std CharOutVec
00FFE082 0CCFFEBE4 ldd #SerialPeekCharDirect
00FFE085 0FD000804 std CharInVec
; swi
; fcb MF_OSCALL
; fcb 24 ; request IO focus
00FFE088 0150F6FFFFFFFE0 ldb COREID
00FFE08D 0C1001 cmpb #FIRST_CORE
00FFE08F 02700D beq init
00FFE091 02004B bra skip_init
00FFE093 0200B3 bra multi_sieve
st3:
00FFE095 0860FF lda #$FF
00FFE097 0150B7FFFE60001 sta LEDS
00FFE09C 020FF7 bra st3
; initialize interrupt controller
; first, zero out all the vectors
init:
00FFE09E 01700042F lbsr rtc_read ; get clock values
00FFE0A1 08E000127 ldx #kbdHeadRcv
00FFE0A4 0C6020 ldb #32 ; number of bytes to zero out
init1:
00FFE0A6 06F800 clr ,x+
00FFE0A8 05A decb
00FFE0A9 026FFB bne init1
00FFE0AB 017000393 lbsr TimerInit
00FFE0AE 017000ABE lbsr InitSerial
00FFE0B1 08E000080 ldx #128
00FFE0B4 086001 lda #1 ; set irq(bit0), clear firq (bit1), disable int (bit 6), clear edge sense(bit 7)
00FFE0B6 0C6001 ldb #FIRST_CORE ; serving core id
st1:
00FFE0B8 06F809E3F000 clr PIC,x ; cause code
00FFE0BC 0A7809E3F001 sta PIC+1,x
00FFE0C0 0E7809E3F002 stb PIC+2,x
00FFE0C4 030004 leax 4,x
00FFE0C6 08C000100 cmpx #256
00FFE0C9 025FED blo st1
; lda #4 ; make the timer interrupt edge sensitive
; sta PIC+4 ; reg #4 is the edge sensitivity setting
; sta PIC ; reg #0 is interrupt enable
00FFE0CB 086081 lda #$81 ; make irq edge sensitive
00FFE0CD 0150B7FFFE3F0FD sta PIC+$FD
00FFE0D2 08601F lda #31 ; enable timer interrupt
00FFE0D4 0150B7FFFE3F009 sta PIC+9
00FFE0D9 0C6001 ldb #1
00FFE0DB 0F7EF1000 stb OUTSEMA+SEMAABS ; set semaphore to 1 available slot
skip_init:
00FFE0DE 01C0EF andcc #$EF ; unmask irq
00FFE0E0 086040 lda #COLS
00FFE0E2 0150B7FFFE07F00 sta TEXTREG+TEXT_COLS
00FFE0E7 086020 lda #ROWS
00FFE0E9 0150B7FFFE07F01 sta TEXTREG+TEXT_ROWS
00FFE0EE 08D13E bsr ClearScreen
00FFE0F0 08D1AF bsr HomeCursor
00FFE0F2 086005 lda #5
00FFE0F4 0150B7FFFE60001 sta LEDS
00FFE0F9 0CCFFE111 ldd #msgStartup
00FFE0FC 08D2C1 bsr DisplayString
00FFE0FE 08E000000 ldx #0
00FFE101 0CC000000 ldd #0
00FFE104 017000C15 lbsr ShowSprites
00FFE107 017000836 lbsr KeybdInit
00FFE10A 0DC124 ldd KeybdID
00FFE10C 08D2FC bsr DispWordAsHex
00FFE10E 07EFFEE60 jmp MonitorStart
msgStartup
00FFE111 072066036038030039020 fcb "rf6809 12-bit System Starting.",CR,LF,0
00FFE118 03103202D062069074020
00FFE11F 05307907307406506D020
00FFE126 05307406107207406906E
00FFE12D 06702E00D00A000
;------------------------------------------------------------------------------
; The checkpoint register must be cleared within 1 second or a NMI interrupt
; will occur. checkpoint should be called with a JSR so that the global ROM
; routine is called.
;
; Modifies:
; none
;------------------------------------------------------------------------------
checkpoint:
00FFE132 01507FFFFFFFFE1 clr $FFFFFFFE1 ; writing any value will do
00FFE137 039 rts
;------------------------------------------------------------------------------
; Copy the system ROM to local RAM
; Running the code from local RAM is probably an order of magnitude faster
; then running from the global ROM. It also reduces the network traffic to
; run from local RAM.
;
; Modifies:
; d,x,y
;------------------------------------------------------------------------------
romToRam:
00FFE138 08EFFC000 ldx #$FFC000
00FFE13B 18E00C000 ldy #$00C000
romToRam1:
00FFE13E 0EC801 ldd ,x++
00FFE140 0EDA01 std ,y++
00FFE142 08C000000 cmpx #0
00FFE145 026FF7 bne romToRam1
00FFE147 039 rts
;------------------------------------------------------------------------------
; Multi-core sieve program.
;------------------------------------------------------------------------------
; First fill screen chars with 'P' indicating prime positions
; Each core is responsible for the Nth position where N is the
; core number minus two.
;
multi_sieve:
00FFE148 086050 lda #'P' ; indicate prime
00FFE14A 0150F6FFFFFFFE0 ldb COREID ; find out which core we are
00FFE14F 0C0001 subb #FIRST_CORE
00FFE151 08E000000 ldx #0 ; start at first char of screen
00FFE154 03A abx
multi_sieve3:
00FFE155 0A7809E00000 sta TEXTSCR,x ; store 'P'
00FFE159 030008 leax 8,x ; advance to next position
00FFE15B 08C000FFF cmpx #4095
00FFE15E 025FF5 blo multi_sieve3
00FFE160 0BDFFE132 jsr checkpoint
*** warning 1: Long branch within short branch range could be optimized
00FFE163 0CB002 addb #2 ; start sieve at 2 (core id)
00FFE165 08604E lda #'N' ; flag position value of 'N' for non-prime
multi_sieve2:
00FFE167 08E000000 ldx #0
00FFE16A 03A abx ; skip the first position - might be prime
multi_sieve1:
00FFE16B 03A abx ; increment
00FFE16C 0A7809E00000 sta TEXTSCR,x
00FFE170 08C000FFF cmpx #4095
00FFE173 025FF6 blo multi_sieve1
00FFE175 0BDFFE132 jsr checkpoint
*** warning 1: Long branch within short branch range could be optimized
00FFE178 0CB008 addb #8 ; number of cores working on it
00FFE17A 0C1FF0 cmpb #4080
00FFE17C 025FE9 blo multi_sieve2
multi_sieve4: ; hang machine
00FFE17E 013 sync
00FFE17F 016000D25 lbra Monitor
;------------------------------------------------------------------------------
; Single core sieve.
;------------------------------------------------------------------------------
sieve:
00FFE182 086050 lda #'P' ; indicate prime
00FFE184 08E000000 ldx #0 ; start at first char of screen
sieve3:
00FFE187 0A7809E00000 sta TEXTSCR,x ; store 'P'
00FFE18B 030001 inx ; advance to next position
00FFE18D 08C000FFF cmpx #4095
00FFE190 025FF5 blo sieve3
00FFE192 0C6002 ldb #2 ; start sieve at 2
00FFE194 08604E lda #'N' ; flag position value of 'N' for non-prime
sieve2:
00FFE196 08E000000 ldx #0
00FFE199 03A abx ; skip the first position - might be prime
sieve1:
00FFE19A 03A abx ; increment
00FFE19B 0A7809E00000 sta TEXTSCR,x
00FFE19F 08C000FFF cmpx #4095
00FFE1A2 025FC7 blo multi_sieve1
00FFE1A4 05C incb ; number of cores working on it
00FFE1A5 0C1FF0 cmpb #4080
00FFE1A7 025FED blo sieve2
sieve4: ; hang machine
00FFE1A9 039 rts
;------------------------------------------------------------------------------
; Three second delay for user convenience and to allow some devices time to
; reset.
;------------------------------------------------------------------------------
Delay3s:
00FFE1AA 0CC895440 ldd #9000000
dly3s1:
00FFE1AD 0C10FF cmpb #$FF
00FFE1AF 026000 bne dly3s2
dly3s2:
00FFE1B1 0150B7FFFE60001 sta LEDS
00FFE1B6 083000001 subd #1
00FFE1B9 026FF2 bne dly3s1
00FFE1BB 039 rts
;------------------------------------------------------------------------------
;------------------------------------------------------------------------------
ShiftLeft5:
00FFE1BC 058 aslb
00FFE1BD 049 rola
00FFE1BE 058 aslb
00FFE1BF 049 rola
00FFE1C0 058 aslb
00FFE1C1 049 rola
00FFE1C2 058 aslb
00FFE1C3 049 rola
00FFE1C4 058 aslb
00FFE1C5 049 rola
00FFE1C6 039 rts
;------------------------------------------------------------------------------
; Parameters:
; b = core id of core to copy
;------------------------------------------------------------------------------
;
CopyVirtualScreenToScreen:
00FFE1C7 034076 pshs d,x,y,u
; Compute virtual screen location for core passed in accb.
00FFE1C9 01F098 tfr b,a
00FFE1CB 048 asla
00FFE1CC 048 asla
00FFE1CD 048 asla
00FFE1CE 048 asla
00FFE1CF 08AC00 ora #$C00
00FFE1D1 05F clrb
00FFE1D2 01F001 tfr d,x
00FFE1D4 034006 pshs d
00FFE1D6 18EE00000 ldy #TEXTSCR
00FFE1D9 0CE000400 ldu #COLS*ROWS/2
cv2s1:
00FFE1DC 0EC801 ldd ,x++
00FFE1DE 0EDA01 std ,y++
00FFE1E0 0335FF leau -1,u
00FFE1E2 283000000 cmpu #0
00FFE1E5 026FF5 bne cv2s1
; reset the cursor position in the text controller
00FFE1E7 035010 puls x
00FFE1E9 0E6808110 ldb CursorRow,x
00FFE1EC 086040 lda #COLS
00FFE1EE 03D mul
00FFE1EF 01F002 tfr d,y
00FFE1F1 0E6808111 ldb CursorCol,x
00FFE1F4 01F021 tfr y,x
00FFE1F6 03A abx
00FFE1F7 0150BFFFFE07F22 stx TEXTREG+TEXT_CURPOS
00FFE1FC 0350F6 puls d,x,y,u,pc
;------------------------------------------------------------------------------
;------------------------------------------------------------------------------
;
CopyScreenToVirtualScreen:
00FFE1FE 034076 pshs d,x,y,u
00FFE200 08D08D bsr GetScreenLocation
00FFE202 01F002 tfr d,y
00FFE204 08EE00000 ldx #TEXTSCR
00FFE207 0CE000400 ldu #COLS*ROWS/2
cs2v1:
00FFE20A 0EC801 ldd ,x++
00FFE20C 0EDA01 std ,y++
00FFE20E 0335FF leau -1,u
00FFE210 283000000 cmpu #0
00FFE213 026FF5 bne cs2v1
00FFE215 0350F6 puls d,x,y,u,pc
;------------------------------------------------------------------------------
;------------------------------------------------------------------------------
00FFE217 054045058054053043052 fcb "TEXTSCR "
00FFE21E 020
00FFE21F FFE229 fcw TextOpen
00FFE221 FFE22A fcw TextClose
00FFE223 FFE22B fcw TextRead
00FFE225 FFE22C fcw TextWrite
00FFE227 FFE22D fcw TextSeek
TextOpen:
00FFE229 039 rts
TextClose:
00FFE22A 039 rts
TextRead:
00FFE22B 039 rts
TextWrite:
00FFE22C 039 rts
TextSeek:
00FFE22D 039 rts
;------------------------------------------------------------------------------
; Clear the screen and the screen color memory
; We clear the screen to give a visual indication that the system
; is working at all.
;
; Modifies:
; none
;------------------------------------------------------------------------------
ClearScreen:
00FFE22E 034076 pshs d,x,y,u
00FFE230 08E000800 ldx #COLS*ROWS
00FFE233 01F013 tfr x,u
00FFE235 08D058 bsr GetScreenLocation
00FFE237 01F002 tfr d,y
00FFE239 0C6020 ldb #' ' ; space char
cs1:
00FFE23B 0E7A00 stb ,y+ ; set text to space
00FFE23D 0301FF leax -1,x ; decrement x
00FFE23F 026FFA bne cs1
00FFE241 0150F6FFFFFFFE0 ldb COREID ; update colors only if we have focus
00FFE246 0F1FFC010 cmpb IOFocusID
00FFE249 02000D bra cs3
00FFE24B 18EE02000 ldy #TEXTSCR+$2000
; lda CharColor
00FFE24E 0860CE lda #$0CE
00FFE250 01F031 tfr u,x ; get back count
cs2:
00FFE252 0A7A00 sta ,y+
00FFE254 0301FF dex ; decrement x
00FFE256 026FFA bne cs2
cs3:
00FFE258 0350F6 puls d,x,y,u,pc
;------------------------------------------------------------------------------
; Scroll text on the screen upwards
;
; Modifies:
; none
;------------------------------------------------------------------------------
ScrollUp:
00FFE25A 034076 pshs d,x,y,u
00FFE25C 18E0003FF ldy #(COLS*ROWS-1)/2 ; y = num chars/2 to move
00FFE25F 08D02E bsr GetScreenLocation
00FFE261 01F001 tfr d,x
00FFE263 01F003 tfr d,u
00FFE265 030040 leax COLS,x ; x = index to source row
scrup1:
00FFE267 0EC801 ldd ,x++ ; move 2 characters
00FFE269 0EDC01 std ,u++
00FFE26B 0313FF dey
00FFE26D 026FF8 bne scrup1
00FFE26F 08601F lda #ROWS-1
00FFE271 08D002 bsr BlankLine
00FFE273 0350F6 puls d,x,y,u,pc
;------------------------------------------------------------------------------
; Blank out a line on the display
;
; Modifies:
; none
; Parameters:
; acca = line number to blank
;------------------------------------------------------------------------------
BlankLine:
00FFE275 034016 pshs d,x
00FFE277 034002 pshs a
00FFE279 08D014 bsr GetScreenLocation
00FFE27B 01F001 tfr d,x
00FFE27D 035002 puls a
00FFE27F 0C6040 ldb #COLS ; b = # chars to blank out from video controller
00FFE281 03D mul ; d = screen index (row# * #cols)
00FFE282 03080B leax d,x
00FFE284 086020 lda #' '
00FFE286 0C6040 ldb #COLS ; b = # chars to blank out from video controller
blnkln1:
00FFE288 0A7800 sta ,x+
00FFE28A 05A decb
00FFE28B 026FFB bne blnkln1
00FFE28D 035096 puls d,x,pc
;------------------------------------------------------------------------------
; Get the location of the screen memory. The location
; depends on whether or not the task has the output focus.
;
; Modifies:
; d
; Retuns:
; d = screen location
;------------------------------------------------------------------------------
GetScreenLocation:
00FFE28F 0150B6FFFFFFFE0 lda COREID ; which core are we?
00FFE294 0B1FFC010 cmpa IOFocusID ; do we have the IO focus
00FFE297 026004 bne gsl1 ; no, go pick virtual screen address
00FFE299 0CCE00000 ldd #TEXTSCR ; yes, we update the real screen
00FFE29C 039 rts
gsl1:
00FFE29D 0CC007800 ldd #$7800
00FFE2A0 039 rts
;------------------------------------------------------------------------------
; HomeCursor
; Set the cursor location to the top left of the screen.
;
; Modifies:
; none
;------------------------------------------------------------------------------
HomeCursor:
00FFE2A1 034016 pshs d,x
00FFE2A3 00F110 clr CursorRow
00FFE2A5 00F111 clr CursorCol
00FFE2A7 0150F6FFFFFFFE0 ldb COREID
00FFE2AC 0F1FFC010 cmpb IOFocusID
00FFE2AF 026006 bne hc1
00FFE2B1 04F clra
00FFE2B2 0150B7FFFE07F22 sta TEXTREG+TEXT_CURPOS
hc1:
00FFE2B7 035096 puls d,x,pc
;------------------------------------------------------------------------------
; Update the cursor position in the text controller based on the
; CursorRow,CursorCol.
;
; Modifies:
; none
;------------------------------------------------------------------------------
;
UpdateCursorPos:
00FFE2B9 034016 pshs d,x
00FFE2BB 0150F6FFFFFFFE0 ldb COREID ; update cursor position in text controller
00FFE2C0 0F1FFC010 cmpb IOFocusID ; only for the task with the output focus
00FFE2C3 026014 bne ucp1
00FFE2C5 096110 lda CursorRow
00FFE2C7 08403F anda #$3F ; limit of 63 rows
00FFE2C9 0150F6FFFE07F00 ldb TEXTREG+TEXT_COLS
00FFE2CE 03D mul
00FFE2CF 01F001 tfr d,x
00FFE2D1 0D6111 ldb CursorCol
00FFE2D3 03A abx
00FFE2D4 0150BFFFFE07F22 stx TEXTREG+TEXT_CURPOS
ucp1:
00FFE2D9 035096 puls d,x,pc
;------------------------------------------------------------------------------
; Calculate screen memory location from CursorRow,CursorCol.
; Also refreshes the cursor location.
;
; Modifies:
; d
; Returns:
; d = screen location
;------------------------------------------------------------------------------
;
CalcScreenLoc:
00FFE2DB 034010 pshs x
00FFE2DD 096110 lda CursorRow
00FFE2DF 0C6040 ldb #COLS
00FFE2E1 03D mul
00FFE2E2 01F001 tfr d,x
00FFE2E4 0D6111 ldb CursorCol
00FFE2E6 03A abx
00FFE2E7 0150F6FFFFFFFE0 ldb COREID ; update cursor position in text controller
00FFE2EC 0F1FFC010 cmpb IOFocusID ; only for the task with the output focus
00FFE2EF 026005 bne csl1
00FFE2F1 0150BFFFFE07F22 stx TEXTREG+TEXT_CURPOS
csl1:
00FFE2F6 08DF97 bsr GetScreenLocation
00FFE2F8 03080B leax d,x
00FFE2FA 01F010 tfr x,d
00FFE2FC 035090 puls x,pc
;------------------------------------------------------------------------------
; Display a character on the screen.
; If the task doesn't have the I/O focus then the character is written to
; the virtual screen.
;
; Modifies:
; none
; Parameters:
; accb = char to display
;------------------------------------------------------------------------------
;
DisplayChar:
00FFE2FE 017000907 lbsr SerialPutChar
00FFE301 034016 pshs d,x
00FFE303 0C100D cmpb #CR ; carriage return ?
00FFE305 026007 bne dccr
00FFE307 00F111 clr CursorCol ; just set cursor column to zero on a CR
00FFE309 08DFAE bsr UpdateCursorPos
dcx14:
00FFE30B 01600008C lbra dcx4
dccr:
00FFE30E 0C1091 cmpb #$91 ; cursor right ?
00FFE310 02600D bne dcx6
00FFE312 096111 lda CursorCol
00FFE314 081040 cmpa #COLS
00FFE316 024003 bhs dcx7
00FFE318 04C inca
00FFE319 097111 sta CursorCol
dcx7:
00FFE31B 08DF9C bsr UpdateCursorPos
00FFE31D 035096 puls d,x,pc
dcx6:
00FFE31F 0C1090 cmpb #$90 ; cursor up ?
00FFE321 026009 bne dcx8
00FFE323 096110 lda CursorRow
00FFE325 027FF4 beq dcx7
00FFE327 04A deca
00FFE328 097110 sta CursorRow
00FFE32A 020FEF bra dcx7
dcx8:
00FFE32C 0C1093 cmpb #$93 ; cursor left ?
00FFE32E 026009 bne dcx9
00FFE330 096111 lda CursorCol
00FFE332 027FE7 beq dcx7
00FFE334 04A deca
00FFE335 097111 sta CursorCol
00FFE337 020FE2 bra dcx7
dcx9:
00FFE339 0C1092 cmpb #$92 ; cursor down ?
00FFE33B 02600B bne dcx10
00FFE33D 096110 lda CursorRow
00FFE33F 081020 cmpa #ROWS
00FFE341 027FD8 beq dcx7
00FFE343 04C inca
00FFE344 097110 sta CursorRow
00FFE346 020FD3 bra dcx7
dcx10:
00FFE348 0C1094 cmpb #$94 ; cursor home ?
00FFE34A 02600C bne dcx11
00FFE34C 096111 lda CursorCol
00FFE34E 027004 beq dcx12
00FFE350 00F111 clr CursorCol
00FFE352 020FC7 bra dcx7
dcx12:
00FFE354 00F110 clr CursorRow
00FFE356 020FC3 bra dcx7
dcx11:
00FFE358 0C1099 cmpb #$99 ; delete ?
00FFE35A 026008 bne dcx13
00FFE35C 08DF7D bsr CalcScreenLoc
00FFE35E 01F001 tfr d,x
00FFE360 096111 lda CursorCol ; acc = cursor column
00FFE362 020011 bra dcx5
dcx13
00FFE364 0C1008 cmpb #CTRLH ; backspace ?
00FFE366 02601E bne dcx3
00FFE368 096111 lda CursorCol
00FFE36A 02702E beq dcx4
00FFE36C 04A deca
00FFE36D 097111 sta CursorCol
00FFE36F 08DF6A bsr CalcScreenLoc
00FFE371 01F001 tfr d,x
00FFE373 096111 lda CursorCol
dcx5:
00FFE375 0E6001 ldb 1,x
00FFE377 0E7801 stb ,x++
00FFE379 04C inca
00FFE37A 081040 cmpa #COLS
00FFE37C 025FF7 blo dcx5
00FFE37E 0C6020 ldb #' '
00FFE380 0301FF dex
00FFE382 0E7804 stb ,x
00FFE384 020014 bra dcx4
dcx3:
00FFE386 0C100A cmpb #LF ; linefeed ?
00FFE388 02700E beq dclf
00FFE38A 034004 pshs b
00FFE38C 08DF4D bsr CalcScreenLoc
00FFE38E 01F001 tfr d,x
00FFE390 035004 puls b
00FFE392 0E7804 stb ,x
; ToDo character color
; lda CharColor
; sta $2000,x
00FFE394 08D006 bsr IncCursorPos
00FFE396 020002 bra dcx4
dclf:
00FFE398 08D011 bsr IncCursorRow
dcx4:
00FFE39A 035096 puls d,x,pc
;------------------------------------------------------------------------------
; Increment the cursor position, scroll the screen if needed.
;
; Modifies:
; none
;------------------------------------------------------------------------------
IncCursorPos:
00FFE39C 034016 pshs d,x
00FFE39E 096111 lda CursorCol
00FFE3A0 04C inca
00FFE3A1 097111 sta CursorCol
00FFE3A3 081040 cmpa #COLS
00FFE3A5 025014 blo icc1
00FFE3A7 00F111 clr CursorCol ; column = 0
00FFE3A9 020002 bra icr1
IncCursorRow:
00FFE3AB 034016 pshs d,x
icr1:
00FFE3AD 096110 lda CursorRow
00FFE3AF 04C inca
00FFE3B0 097110 sta CursorRow
00FFE3B2 081020 cmpa #ROWS
00FFE3B4 025005 blo icc1
00FFE3B6 04A deca ; backup the cursor row, we are scrolling up
00FFE3B7 097110 sta CursorRow
00FFE3B9 08DE9F bsr ScrollUp
icc1:
00FFE3BB 08DEFC bsr UpdateCursorPos
icc2:
00FFE3BD 035096 puls d,x,pc
;------------------------------------------------------------------------------
; Display a string on the screen.
;
; Modifies:
; none
; Parameters:
; d = pointer to string
;------------------------------------------------------------------------------
;
DisplayString:
00FFE3BF 034016 pshs d,x
00FFE3C1 01F001 tfr d,x
dspj2: ; lock semaphore for access
00FFE3C3 0B6EF0001 lda OUTSEMA+1
00FFE3C6 027FFB beq dspj2
dspj1B:
00FFE3C8 0E6800 ldb ,x+ ; move string char into acc
00FFE3CA 027005 beq dsretB ; is it end of string ?
00FFE3CC 017000943 lbsr OUTCH ; display character
00FFE3CF 020FF7 bra dspj1B
dsretB:
00FFE3D1 07FEF0001 clr OUTSEMA+1 ; unlock semaphore
00FFE3D4 035096 puls d,x,pc
DisplayStringCRLF:
00FFE3D6 034006 pshs d
00FFE3D8 08DFE5 bsr DisplayString
00FFE3DA 0C600D ldb #CR
00FFE3DC 017000933 lbsr OUTCH
00FFE3DF 0C600A ldb #LF
00FFE3E1 01700092E lbsr OUTCH
00FFE3E4 035086 puls d,pc
;
; PRINT CR, LF, STRING
;
PSTRNG
00FFE3E6 08D002 BSR PCRLF
00FFE3E8 02000D BRA PDATA
PCRLF
00FFE3EA 034010 PSHS X
00FFE3EC 08EFFE3FE LDX #CRLFST
00FFE3EF 08D006 BSR PDATA
00FFE3F1 035010 PULS X
00FFE3F3 039 RTS
00FFE3F4 0BDFFED12 JSR OUTCH
PDATA
00FFE3F7 0E6800 LDB ,X+
00FFE3F9 0C1004 CMPB #$04
00FFE3FB 026FF7 BNE PRINT
00FFE3FD 039 RTS
CRLFST
00FFE3FE 00D00A004 fcb CR,LF,4
DispDWordAsHex:
00FFE401 08D007 bsr DispWordAsHex
00FFE403 01E001 exg d,x
00FFE405 08D003 bsr DispWordAsHex
00FFE407 01E001 exg d,x
00FFE409 039 rts
DispWordAsHex:
00FFE40A 01E089 exg a,b
00FFE40C 08D005 bsr DispByteAsHex
00FFE40E 01E089 exg a,b
00FFE410 08D001 bsr DispByteAsHex
00FFE412 039 rts
DispByteAsHex:
00FFE413 034004 pshs b
00FFE415 054 lsrb
00FFE416 054 lsrb
00FFE417 054 lsrb
00FFE418 054 lsrb
00FFE419 054 lsrb
00FFE41A 054 lsrb
00FFE41B 054 lsrb
00FFE41C 054 lsrb
00FFE41D 08D00C bsr DispNyb
00FFE41F 035004 puls b
00FFE421 034004 pshs b
00FFE423 054 lsrb
00FFE424 054 lsrb
00FFE425 054 lsrb
00FFE426 054 lsrb
00FFE427 08D002 bsr DispNyb
00FFE429 035004 puls b
DispNyb
00FFE42B 034004 pshs b
00FFE42D 0C400F andb #$0F
00FFE42F 0C100A cmpb #10
00FFE431 025007 blo DispNyb1
00FFE433 0CB037 addb #'A'-10
00FFE435 0170008DA lbsr OUTCH
00FFE438 035084 puls b,pc
DispNyb1
00FFE43A 0CB030 addb #'0'
00FFE43C 0170008D3 lbsr OUTCH
00FFE43F 035084 puls b,pc
;==============================================================================
; Timer
;==============================================================================
; ============================================================================
; __
; \\__/ o\ (C) 2022 Robert Finch, Waterloo
; \ __ / All rights reserved.
; \/_// robfinch<remove>@opencores.org
; ||
;
;
; Timer routines for a WDC6522 compatible circuit.
;
; This source file is free software: you can redistribute it and/or modify
; it under the terms of the GNU Lesser General Public License as published
; by the Free Software Foundation, either version 3 of the License, or
; (at your option) any later version.
;
; This source file is distributed in the hope that it will be useful,
; but WITHOUT ANY WARRANTY; without even the implied warranty of
; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
; GNU General Public License for more details.
;
; You should have received a copy of the GNU General Public License
; along with this program. If not, see <http://www.gnu.org/licenses/>.
;
; ============================================================================
;
TimerInit:
00FFE441 0CC061A80 ldd #$61A80 ; compare to 400000 (100 Hz assuming 40MHz clock)
00FFE444 0150F7FFFE60014 stb VIA+VIA_T3CMPL
00FFE449 0150B7FFFE60015 sta VIA+VIA_T3CMPH
00FFE44E 01507FFFFE60012 clr VIA+VIA_T3LL
00FFE453 01507FFFFE60013 clr VIA+VIA_T3LH
00FFE458 0150B6FFFE6000B lda VIA+VIA_ACR ; set continuous mode for timer
00FFE45D 08A100 ora #$100
00FFE45F 0150B7FFFE6000B sta VIA+VIA_ACR ; enable timer #3 interrupts
00FFE464 086810 lda #$810
00FFE466 0150B7FFFE6000E sta VIA+VIA_IER
00FFE46B 039 rts
TimerIRQ:
; Reset the edge sense circuit in the PIC
00FFE46C 08601F lda #31 ; Timer is IRQ #31
00FFE46E 0B7FFC011 sta IrqSource ; stuff a byte indicating the IRQ source for PEEK()
00FFE471 0150B7FFFE3F010 sta PIC+16 ; register 16 is edge sense reset reg
00FFE476 0150B6FFFE6000D lda VIA+VIA_IFR
00FFE47B 02A011 bpl notTimerIRQ
00FFE47D 085080 bita #$80 ; timer3 irq is bit 7
00FFE47F 02700D beq notTimerIRQ
00FFE481 01507FFFFE60012 clr VIA+VIA_T3LL
00FFE486 01507FFFFE60013 clr VIA+VIA_T3LH
00FFE48B 07CE00037 inc $E00037 ; update timer IRQ screen flag
notTimerIRQ:
00FFE48E 039 rts
; ============================================================================
; __
; \\__/ o\ (C) 2013-2022 Robert Finch, Waterloo
; \ __ / All rights reserved.
; \/_// robfinch<remove>@opencores.org
; ||
;
;
; BSD 3-Clause License
; Redistribution and use in source and binary forms, with or without
; modification, are permitted provided that the following conditions are met:
;
; 1. Redistributions of source code must retain the above copyright notice, this
; list of conditions and the following disclaimer.
;
; 2. Redistributions in binary form must reproduce the above copyright notice,
; this list of conditions and the following disclaimer in the documentation
; and/or other materials provided with the distribution.
;
; 3. Neither the name of the copyright holder nor the names of its
; contributors may be used to endorse or promote products derived from
; this software without specific prior written permission.
;
; THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
; AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
; DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
; SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
; CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
; OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
; OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
;
; ============================================================================
;
;===============================================================================
; Generic I2C routines
;
; It is assumed there may be more than one I2C controller in the system, so
; the address of the controller is passed in the X register.
;===============================================================================
I2C_PREL EQU $0
I2C_PREH EQU $1
I2C_CTRL EQU $2
I2C_RXR EQU $3
I2C_TXR EQU $3
I2C_CMD EQU $4
I2C_STAT EQU $4
; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
; i2c initialization, sets the clock prescaler
;
; Parameters:
; x = I2C controller address
; Returns: none
; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
i2c_init:
00FFE48F 034004 pshs b
00FFE491 0C6004 ldb #4 ; setup prescale for 400kHz clock
00FFE493 0E7804 stb I2C_PREL,x
00FFE495 06F001 clr I2C_PREH,x
00FFE497 035084 puls b,pc
; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
; Wait for I2C transfer to complete
;
; Parameters
; x - I2C controller base address
; - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
i2c_wait_tip:
00FFE499 034004 pshs b
i2cw1:
00FFE49B 0E6004 ldb I2C_STAT,x ; would use lvb, but lb is okay since its the I/O area
00FFE49D 0C5001 bitb #1 ; wait for tip to clear
00FFE49F 026FFA bne i2cw1
00FFE4A1 035084 puls b,p