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[/] [softavrcore/] [trunk/] [synth/] [top-bg121.pcf] - Rev 2

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# GRBAlpha ballon payload board

set_io led[1] A4
set_io led[0] B4

set_io hwclk L5

# This is the input for the FPGA, signal comes from the FT2232:
set_io ftdi_rx K7
# This is the output for the FPGA, signal goes to the FT2232:
set_io ftdi_tx L7

set_io sseg4[12] B2              # DD
set_io sseg4[11] D2              # D1
set_io sseg4[10] C2              # D2
set_io sseg4[9] A2               # D3
set_io sseg4[8] B3               # D4
set_io sseg4[7] G2               # a
set_io sseg4[6] E2               # b
set_io sseg4[5] H1               # c
set_io sseg4[4] E1               # d
set_io sseg4[3] F1               # e
set_io sseg4[2] F2               # f
set_io sseg4[1] D1               # g
set_io sseg4[0] G1               # dp

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