OpenCores
URL https://opencores.org/ocsvn/spi_master_slave/spi_master_slave/trunk

Subversion Repositories spi_master_slave

[/] [spi_master_slave/] [trunk/] [syn/] [spi_master_atlys_top.xst] - Rev 20

Compare with Previous | Blame | View Log

set -tmpdir "xst/projnav.tmp"
set -xsthdpdir "xst"
run
-ifn spi_master_atlys_top.prj
-ifmt mixed
-ofn spi_master_atlys_top
-ofmt NGC
-p xc6slx45-2-csg324
-top spi_master_atlys_top
-opt_mode Speed
-opt_level 2
-power NO
-iuc NO
-keep_hierarchy No
-netlist_hierarchy As_Optimized
-rtlview Yes
-glob_opt AllClockNets
-read_cores YES
-write_timing_constraints NO
-cross_clock_analysis NO
-hierarchy_separator /
-bus_delimiter <>
-case Maintain
-slice_utilization_ratio 100
-bram_utilization_ratio 100
-dsp_utilization_ratio 100
-lc Area
-reduce_control_sets Auto
-fsm_extract YES -fsm_encoding Gray
-safe_implementation No
-fsm_style LUT
-ram_extract No
-rom_extract No
-shreg_extract NO
-auto_bram_packing NO
-resource_sharing YES
-async_to_sync NO
-shreg_min_size 2
-use_dsp48 Auto
-iobuf YES
-max_fanout 100000
-bufg 16
-register_duplication YES
-register_balancing No
-optimize_primitives NO
-use_clock_enable Auto
-use_sync_set Auto
-use_sync_reset Auto
-iob Auto
-equivalent_register_removal YES
-slice_utilization_ratio_maxmargin 5

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2020 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.