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Subversion Repositories steelcore
[/] [vivado/] [steel-core.sim/] [sim_1/] [behav/] [xsim/] [webtalk_17955.backup.log] - Rev 11
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#-----------------------------------------------------------# Webtalk v2019.2 (64-bit)# SW Build 2708876 on Wed Nov 6 21:39:14 MST 2019# IP Build 2700528 on Thu Nov 7 00:09:20 MST 2019# Start of session at: Sat Oct 10 23:58:08 2020# Process ID: 17955# Current directory: /home/rafa/ufrgs/steel-core/vivado/steel-core.sim/sim_1/behav/xsim# Command line: wbtcv -mode batch -source /home/rafa/ufrgs/steel-core/vivado/steel-core.sim/sim_1/behav/xsim/xsim.dir/tb_compliance_behav/webtalk/xsim_webtalk.tcl -notrace# Log file: /home/rafa/ufrgs/steel-core/vivado/steel-core.sim/sim_1/behav/xsim/webtalk.log# Journal file: /home/rafa/ufrgs/steel-core/vivado/steel-core.sim/sim_1/behav/xsim/webtalk.jou#-----------------------------------------------------------source /home/rafa/ufrgs/steel-core/vivado/steel-core.sim/sim_1/behav/xsim/xsim.dir/tb_compliance_behav/webtalk/xsim_webtalk.tcl -notraceINFO: [Common 17-186] '/home/rafa/ufrgs/steel-core/vivado/steel-core.sim/sim_1/behav/xsim/xsim.dir/tb_compliance_behav/webtalk/usage_statistics_ext_xsim.xml' has been successfully sent to Xilinx on Sat Oct 10 23:58:12 2020. For additional details about this file, please refer to the WebTalk help file at /home/rafa/Xilinx/Vivado/2019.2/doc/webtalk_introduction.html.INFO: [Common 17-206] Exiting Webtalk at Sat Oct 10 23:58:12 2020...
