sys Project Status (02/12/2019 - 07:59:26) | |||
Project File: | xilinx_scope.xise | Parser Errors: | No Errors |
Module Name: | sys | Implementation State: | Programming File Generated |
Target Device: | xc3s500e-4fg320 |
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No Errors |
Product Version: | ISE 14.7 |
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144 Warnings (0 new) |
Design Goal: | Balanced |
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All Signals Completely Routed |
Design Strategy: | Xilinx Default (unlocked) |
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All Constraints Met |
Environment: | System Settings |
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0 (Timing Report) |
Device Utilization Summary | [-] | ||||
Logic Utilization | Used | Available | Utilization | Note(s) | |
Number of Slice Flip Flops | 1,159 | 9,312 | 12% | ||
Number of 4 input LUTs | 5,374 | 9,312 | 57% | ||
Number of occupied Slices | 3,210 | 4,656 | 68% | ||
Number of Slices containing only related logic | 3,210 | 3,210 | 100% | ||
Number of Slices containing unrelated logic | 0 | 3,210 | 0% | ||
Total Number of 4 input LUTs | 5,807 | 9,312 | 62% | ||
Number used as logic | 5,374 | ||||
Number used as a route-thru | 433 | ||||
Number of bonded IOBs | 28 | 232 | 12% | ||
IOB Master Pads | 4 | ||||
IOB Slave Pads | 4 | ||||
Number of ODDR2s used | 1 | ||||
Number of RAMB16s | 14 | 20 | 70% | ||
Number of BUFGMUXs | 8 | 24 | 33% | ||
Number of DCMs | 4 | 4 | 100% | ||
Average Fanout of Non-Clock Nets | 3.64 |
Performance Summary | [-] | |||
Final Timing Score: | 0 (Setup: 0, Hold: 0, Component Switching Limit: 0) | Pinout Data: | Pinout Report | |
Routing Results: | All Signals Completely Routed | Clock Data: | Clock Report | |
Timing Constraints: | All Constraints Met |
Detailed Reports | [-] | |||||
Report Name | Status | Generated | Errors | Warnings | Infos | |
Synthesis Report | Current | Tue Feb 12 07:55:03 2019 | 0 | 106 Warnings (0 new) | 16 Infos (0 new) | |
Translation Report | Current | Tue Feb 12 07:55:12 2019 | 0 | 0 | 1 Info (0 new) | |
Map Report | Current | Tue Feb 12 07:55:26 2019 | 0 | 33 Warnings (0 new) | 6 Infos (0 new) | |
Place and Route Report | Current | Tue Feb 12 07:56:28 2019 | 0 | 0 | 0 | |
Power Report | ||||||
Post-PAR Static Timing Report | Current | Tue Feb 12 07:56:37 2019 | 0 | 0 | 5 Infos (0 new) | |
Bitgen Report | Current | Tue Feb 12 07:59:20 2019 | 0 | 5 Warnings (0 new) | 4 Infos (0 new) |
Secondary Reports | [-] | ||
Report Name | Status | Generated | |
WebTalk Report | Current | Tue Feb 12 07:59:21 2019 | |
WebTalk Log File | Current | Tue Feb 12 07:59:25 2019 |